From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/panel/boe-tv101wum-nl6: set MIPI_DSI_MODE_LPM after sending panel disable cmds Date: Thu, 23 Apr 2026 08:22:29 +1000 Message-ID: In-Reply-To: <20260421153147.4378-2-brady.norander@mainlining.org> References: <20260421153147.4378-2-brady.norander@mainlining.org> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Overall Series Review Subject: drm/panel/boe-tv101wum-nl6: set MIPI_DSI_MODE_LPM after sending panel disable cmds Author: Brady Norander Patches: 1 Reviewed: 2026-04-23T08:22:29.769041 --- This is a single-patch fix for a real visual regression on MT8183 krane Chromebook hardware. The commit message clearly explains the root cause: a recent Mediatek DRM change enabled HS mode support, and the boe-tv101wum-nl6 panel driver was clearing `MIPI_DSI_MODE_LPM` in `boe_panel_disable()` to send disable commands in HS mode but never restoring it. This left the DSI link in HS mode permanently after the first disable cycle, causing color issues on subsequent enable. The fix is minimal, correct, and follows established patterns in other panel drivers. The code change is a single line addition that restores `MIPI_DSI_MODE_LPM` after the disable commands have been sent and the sleep delay has elapsed. This is a clean, low-risk bugfix. **Verdict: Looks good. This should be straightforward to accept.** One minor nit: the patch lacks a `Fixes:` tag. It would be helpful to include one referencing the Mediatek DRM commit that exposed this issue, or at least the original commit that introduced the asymmetric LPM clearing in `boe_panel_disable()`. This would help stable backport triage. --- Generated by Claude Code Patch Reviewer