From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm: Add PERFCNTR_CONFIG ioctl Date: Thu, 07 May 2026 13:19:02 +1000 Message-ID: In-Reply-To: <20260506171127.133572-1-robin.clark@oss.qualcomm.com> References: <20260506171127.133572-1-robin.clark@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Overall Series Review Subject: drm/msm: Add PERFCNTR_CONFIG ioctl Author: Rob Clark Patches: 16 Reviewed: 2026-05-07T13:19:02.979296 --- This is a well-structured 16-patch series adding a `PERFCNTR_CONFIG` ioctl to the MSM/Adreno DRM driver, enabling both global (kernel-managed) and local (per-context) performance counter collection for GPU profiling. The series cleanly removes legacy perf infrastructure, introduces generated perfcntr tables synced from Mesa, builds up the internal infrastructure, and finally wires up the UAPI and IFPC integration. The overall architecture is sound: global counters are kernel-sampled via hrtimer into a FIFO exposed through an anon_inode fd, while local counters let userspace reserve slots without privilege. Counter allocation from high-to-low to avoid conflicts with old UMD is a practical design choice. There are several issues worth addressing, ranging from potential null-pointer dereferences and missing validation to lock ordering concerns and FIFO edge cases. The most significant issues are in the ioctl implementation (patch 13). --- Generated by Claude Code Patch Reviewer