From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: gpu/drm: tegra: add DSI support for Tegra20/Tegra30 Date: Sat, 16 May 2026 15:48:58 +1000 Message-ID: In-Reply-To: <20260511074538.24563-1-clamor95@gmail.com> References: <20260511074538.24563-1-clamor95@gmail.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: gpu/drm: tegra: add DSI support for Tegra20/Tegra30 Author: Svyatoslav Ryhel Patches: 3 Reviewed: 2026-05-16T15:48:58.584162 --- This is a well-structured 2-patch series adding DSI support for Tegra20/Teg= ra30 to the existing Tegra DSI driver. The approach is sound: introduce a p= er-SoC config struct with boolean flags to gate the hardware differences (p= ad control registers and clock muxing), then make `clk_lp` optional since T= egra20/Tegra30 don't have it. The second patch re-introduces a bootloader-D= SI workaround with better placement. Both patches have a Reviewed-by from M= ikko Perttunen and the author has tested on real hardware across multiple S= oC generations. **Overall assessment: Series looks good with minor issues.** The primary concern is in patch 2 where `tegra_dsi_disable()` is called unc= onditionally =E2=80=94 including on ganged-mode setups where `dsi->slave` m= ay not be initialized yet =E2=80=94 and the comment style doesn't match ker= nel conventions. Patch 1 is clean and well-factored. --- --- Generated by Claude Code Patch Reviewer