From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/amd/display: convert GPIO translation logic to lookup tables Date: Sat, 16 May 2026 13:03:12 +1000 Message-ID: In-Reply-To: <20260512190019.228440-1-guilherme.bozi@usp.br> References: <20260512190019.228440-1-guilherme.bozi@usp.br> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Overall Series Review Subject: drm/amd/display: convert GPIO translation logic to lookup tables Author: Guilherme Ivo Bozi Patches: 10 Reviewed: 2026-05-16T13:03:12.579109 --- This is a well-structured refactoring series that replaces repetitive switch-statement GPIO translation logic across 8 DCN generations with static lookup tables and shared helper functions. The approach is sound: patch 1 introduces the infrastructure (table entry types, macros, and three generic lookup helpers), and patches 2-9 mechanically convert each ASIC. The series achieves a net reduction of ~760 lines while making the per-ASIC GPIO mappings declarative and easier to audit. The table structures are well-designed with the `check_mask` flag in `gpio_id_offset_entry` to handle both mask-discriminated entries (via `GPIO_MASK_ENTRY`) and simple offset-only entries (via `GPIO_ENTRY`, used by dcn42's per-HPD registers). Behavioral equivalence is preserved across all conversions. The DDC mask values (e.g., `DDC1DATA_A_MASK` vs `DDC6DATA_A_MASK`) are identical constants (0x100 / 0x1) across all DDC channels in the hardware, so using any one channel's mask macro for all DDC lines is correct. The GSL omission from `gpio_pins[]` in dcn20+ is properly commented and matches the original "not implemented" assert paths. The dcn401 DDC5 commented-out entries match the original code. Overall: **the series looks good** and is ready to merge with a couple of minor nits below. --- Generated by Claude Code Patch Reviewer