From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: Add eDP lane mapping support Date: Sat, 16 May 2026 11:13:13 +1000 Message-ID: In-Reply-To: <20260514070133.2275069-1-damon.ding@rock-chips.com> References: <20260514070133.2275069-1-damon.ding@rock-chips.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: Add eDP lane mapping support Author: Damon Ding Patches: 9 Reviewed: 2026-05-16T11:13:13.157156 --- This is a clean, well-structured 3-patch series that adds configurable eDP/= DP physical lane mapping via the `data-lanes` device tree property to the A= nalogix DP bridge driver. The use case is legitimate =E2=80=94 correcting P= CB lane swaps and adapting mismatched lane pin definitions between SoC and = panel without hardware changes. The series is logically ordered: DT binding fixups first, then binding addi= tions, then the driver implementation. The driver patch is conservative, fa= lling back to the default identity mapping when no `data-lanes` is specifie= d. I have a few concerns, mostly around the parsing logic in patch 3 that sile= ntly absorbs errors that should probably be propagated, and a question abou= t the deprecated top-level `data-lanes` property added in patch 2. **Overall: Looks reasonable with minor issues to address.** --- --- Generated by Claude Code Patch Reviewer