From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/bridge: lt9611uxc: support displays with up to 4 EDID blocks Date: Mon, 18 May 2026 16:00:28 +1000 Message-ID: In-Reply-To: <20260517-lt9611usc_edid34_misc_next-v1-1-5e2fd8c6399b@oss.qualcomm.com> References: <20260517-lt9611usc_edid34_misc_next-v1-1-5e2fd8c6399b@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: drm/bridge: lt9611uxc: support displays with up to 4 EDID blocks Author: vishnu.saini@oss.qualcomm.com Patches: 4 Reviewed: 2026-05-18T16:00:28.122513 --- This single-patch series extends the LT9611UXC bridge driver to read up to = 4 EDID blocks (previously 2), and caches the EDID until the next HPD discon= nect. The goal is reasonable =E2=80=94 many modern displays expose CTA exte= nsion blocks beyond the first two =E2=80=94 but the implementation has a **= critical memory corruption bug** in the retry loop, several concurrency con= cerns, a missing cleanup in `lt9611uxc_remove`, and some code quality issue= s. **Verdict: Needs revision.** The memcmp bug alone would cause undefined beh= avior in every retry path. --- --- Generated by Claude Code Patch Reviewer