From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: accel/ivpu: Remove disable_d0i3_msg workaround Date: Wed, 27 May 2026 14:51:17 +1000 Message-ID: In-Reply-To: <20260526125521.594479-1-andrzej.kacprowski@linux.intel.com> References: <20260526125521.594479-1-andrzej.kacprowski@linux.intel.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: accel/ivpu: Remove disable_d0i3_msg workaround Author: Andrzej Kacprowski Patches: 2 Reviewed: 2026-05-27T14:51:17.107370 --- This is a single, well-scoped cleanup patch that removes the `disable_d0i3_= msg` workaround from the Intel VPU (NPU) accelerator driver. The rationale = is clear: all published firmware versions support D0i3 delayed entry, and n= ewer firmware has dropped the legacy path entirely, making the workaround d= ead code. The patch is **straightforward and correct**. All references to the workaro= und are consistently removed across all four files =E2=80=94 the workaround= flag in the WA table, the test mode bits, the initialization function, the= conditional in boot params setup, and the early-return guard in the JSM D0= i3 entry path. The `d0i3_delayed_entry` boot param is now unconditionally s= et to 1, which is the safe/correct value for all supported firmware. The patch also bumps the boot API patch version (4 =E2=86=92 5) and updates= the documentation comment for the `d0i3_delayed_entry` field to note depre= cation on NPU50xx+, which is a good practice. **No bugs or issues found.** This is a clean removal of dead code with no f= unctional concerns. --- Generated by Claude Code Patch Reviewer