From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/v3d: Fix indirect CSD jobs with zeroed workgroups Date: Thu, 04 Jun 2026 12:23:39 +1000 Message-ID: In-Reply-To: <20260602-v3d-fix-indirect-csd-v4-0-654309e32bc0@igalia.com> References: <20260602-v3d-fix-indirect-csd-v4-0-654309e32bc0@igalia.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: drm/v3d: Fix indirect CSD jobs with zeroed workgroups Author: =3D?utf-8?q?Ma=3DC3=3DADra_Canal?=3D Patches: 5 Reviewed: 2026-06-04T12:23:39.573582 --- This is a well-structured 2-patch bugfix series addressing two related issu= es with indirect CSD (Compute Shader Dispatch) on V3D when the GPU buffer c= ontains zeroed workgroup counts. The series is authored by Ma=C3=ADra Canal= at Igalia and is at v4, with Iago Toral's Reviewed-by on patch 1. Both pat= ches target stable. The problems are: 1. A vaddr leak from early-return without unmapping BOs. 2. Hardware misinterpretation of zero workgroup counts as 65536. The fixes are clean, minimal, and correctly ordered =E2=80=94 the leak fix = comes first so it can be backported independently. The v4 revision improves= on v3 by always writing CFG[0..2] from the indirect buffer before checking= for zeros, which avoids leaving stale userspace values in the config regis= ters. The series is tested against relevant CTS tests. **Verdict: Series looks good.** One minor observation on patch 2 below (mis= sing `active_job =3D NULL` for consistency), but it's not a correctness bug. --- Generated by Claude Code Patch Reviewer