From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: misc: fastrpc: Add cache maintenance for non-coherent platforms Date: Fri, 05 Jun 2026 05:54:35 +1000 Message-ID: In-Reply-To: <20260604194811.2437567-1-abhinav.parihar@oss.qualcomm.com> References: <20260604194811.2437567-1-abhinav.parihar@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: misc: fastrpc: Add cache maintenance for non-coherent platforms Author: Abhinav Parihar Patches: 1 Reviewed: 2026-06-05T05:54:35.360233 --- This single patch adds explicit cache maintenance (flush/invalidate) for fa= strpc argument buffers on platforms that lack DMA coherency between the CPU= and DSP. The intent is sound =E2=80=94 non-coherent platforms need softwar= e cache management =E2=80=94 but the implementation has a **critical correc= tness bug** in the invalidation path (mismatched DMA direction in `dma_buf_= end_cpu_access`), ignores error returns from the dma-buf API, and uses a so= mewhat unconventional cache-maintenance pattern that deserves closer scruti= ny. **Verdict: Needs revision before merge.** --- --- Generated by Claude Code Patch Reviewer