From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/amd/display: Increase DCN314 SR latency by 1us Date: Mon, 16 Mar 2026 12:18:55 +1000 Message-ID: In-Reply-To: References: X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Overall Series Review Subject: drm/amd/display: Increase DCN314 SR latency by 1us Author: Zhang Zhenzhe Patches: 1 Reviewed: 2026-03-16T12:18:55.915158 --- This is a single-patch series that increases DCN314 self-refresh (SR) enter= /exit latency values by 1=CE=BCs to fix display underflow on laptops with L= PDDR5 memory. The change is simple, low-risk, and targets a specific report= ed bug. The approach =E2=80=94 adding margin to timing parameters =E2=80=94= is a common and well-understood fix pattern for display underflow issues i= n the AMDGPU display stack. **Concern:** The commit message says "It's unclear why it only occurs on sp= ecific desktop contents," which is honest but not fully reassuring. The fix= is empirical (add 1=CE=BCs of margin) rather than root-cause-driven. That = said, this is typical for display watermark tuning and the values are conse= rvative bumps. --- Generated by Claude Code Patch Reviewer