Claude review: drm/bridge: ti-sn65dsi83: fix CHA_DSI_CLK_RANGE rounding

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Verdict: Looks good.**

The fix is correct. The register encoding is:

```
(CHA_DSI_CLK_RANGE * 5 MHz) <= DSI_CLK < ((CHA_DSI_CLK_RANGE + 1) * 5 MHz)
```

This means the register value should be the floor of `DSI_CLK / 5 MHz`. The old code:

```c
return DIV_ROUND_UP(clamp(..., 40000U, 500000U), 5000U);
```

rounds up, producing an off-by-one for any frequency that isn't an exact multiple of 5 MHz. The new code:

```c
return clamp(..., 40000U, 500000U) / 5000U;
```

uses truncating integer division, which is the correct floor operation here. The example in the commit message (437.1 MHz → register 87 vs incorrect 88) clearly demonstrates the issue.

Fixes tag and stable Cc are appropriate.

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