From mboxrd@z Thu Jan  1 00:00:00 1970
From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/sun4i: Fix resource leaks
Date: Fri, 27 Feb 2026 11:44:46 +1000
Message-ID: <review-patch1-20260226163836.10335-1-ethantidmore06@gmail.com>
In-Reply-To: <20260226163836.10335-1-ethantidmore06@gmail.com>
References: <20260226163836.10335-1-ethantidmore06@gmail.com> <20260226163836.10335-1-ethantidmore06@gmail.com>
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Patch Review

**The bug:** In `sun4i_backend_bind()`, at the point where `devm_regmap_ini=
t_mmio()` is called (line 877), the following non-devm resources have alrea=
dy been acquired:
1. Reset deasserted (`reset_control_deassert` at line 831)
2. `bus_clk` enabled (`clk_prepare_enable` at line 843)
3. `mod_clk` rate set exclusively and enabled (lines 852, 858)
4. `ram_clk` enabled (`clk_prepare_enable` at line 866)

The original code did a bare `return PTR_ERR(backend->engine.regs)`, skippi=
ng all cleanup.

**The fix is correct:**

```c
-		return PTR_ERR(backend->engine.regs);
+		ret =3D PTR_ERR(backend->engine.regs);
+		goto err_disable_ram_clk;
```

The `err_disable_ram_clk` label at line 932 chains through all the necessar=
y cleanup in proper reverse order:
```c
err_disable_ram_clk:
	clk_disable_unprepare(backend->ram_clk);
err_disable_mod_clk:
	clk_rate_exclusive_put(backend->mod_clk);
	clk_disable_unprepare(backend->mod_clk);
err_disable_bus_clk:
	clk_disable_unprepare(backend->bus_clk);
err_assert_reset:
	reset_control_assert(backend->reset);
	return ret;
```

This correctly releases all four resources that were acquired.

**Minor nit on commit message:** The commit message says "Three clocks are =
not being released" =E2=80=94 this is accurate for the clocks, but the rese=
t control (`backend->reset`) is also leaked by the direct return. The fix h=
andles this correctly via the goto chain, but the commit message could be m=
ore precise (e.g., "Three clocks and a reset control are not being released=
"). This is cosmetic.

**Pre-existing issue (not introduced by this patch):** On `sun8i-a33` devic=
es, `sun4i_backend_init_sat()` is called just before the regmap init (line =
870). If SAT init succeeds but regmap init subsequently fails, jumping to `=
err_disable_ram_clk` does not call `sun4i_backend_free_sat()`, leaking the =
SAT clock and reset. This is a separate pre-existing bug =E2=80=94 the patc=
h correctly uses the same goto target that SAT init failure itself uses =E2=
=80=94 but the author may want to address it as a follow-up.

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