From mboxrd@z Thu Jan  1 00:00:00 1970
From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: accel/amdxdna: Fix major version check on NPU1 platform
Date: Thu, 05 Mar 2026 13:17:56 +1000
Message-ID: <review-patch1-20260304195012.3616908-1-lizhi.hou@amd.com>
In-Reply-To: <20260304195012.3616908-1-lizhi.hou@amd.com>
References: <20260304195012.3616908-1-lizhi.hou@amd.com> <20260304195012.3616908-1-lizhi.hou@amd.com>
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Patch Review

**The bug:** In `npu1_fw_feature_table[]`, the second entry is missing `.major = 5`:

```c
static const struct aie2_fw_feature_tbl npu1_fw_feature_table[] = {
	{ .major = 5, .min_minor = 7 },
	{ .features = BIT_U64(AIE2_NPU_COMMAND), .min_minor = 8 },  // .major defaults to 0
	{ 0 }
};
```

The iteration loop in `aie2_pci.c:67` uses `feature->major` as the loop continuation condition:
```c
for (feature = ndev->priv->fw_feature_tbl; feature->major; feature++) {
```

So the missing `.major` causes the entry to be treated as the sentinel/terminator (`{ 0 }`), meaning the `AIE2_NPU_COMMAND` feature is never detected on NPU1 platforms.

**The fix** adds `.major = 5` to match the first entry and be consistent with how `npu4_fw_feature_table` (in `npu4_regs.c:93`) correctly specifies `.major` on every entry:
```c
{ .features = BIT_U64(AIE2_NPU_COMMAND), .major = 6, .min_minor = 15 },
```

**No issues found.** The fix is a one-line data correction, straightforward and obviously correct.

Reviewed-by worthy.

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