Claude review: drm/msm/mdss: correct UBWC programming sequences

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

Rewrites UBWC register programming to use MDSS HW revision instead of decoder version. Introduces `MDSS_HW_VER()` macro and consolidates 5 setup functions into 3.

The key dispatch change:
```c
+	hw_rev = readl_relaxed(msm_mdss->mmio + REG_MDSS_HW_VERSION);
+
+	if (hw_rev >= MDSS_HW_VER(6, 0, 0))
+		msm_mdss_setup_ubwc_v6(msm_mdss);
+	else if (hw_rev >= MDSS_HW_VER(5, 0, 0))
+		msm_mdss_setup_ubwc_v5(msm_mdss);
+	else if (hw_rev >= MDSS_HW_VER(4, 0, 0))
+		msm_mdss_setup_ubwc_v4(msm_mdss);
+	/* else UBWC 1.0 or none, no params to program */
```

The `msm_mdss_setup_ubwc_v6` now includes an inline version-to-tag ladder and prediction_mode logic based on `ubwc_enc_version`. This is good -- it removes the incorrect assumption that MDSS registers track UBWC decoder versions.

**Issue**: In `msm_mdss_setup_ubwc_v4`, the swizzle is masked with `& 0x1`:
```c
+	u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle & 0x1) |
```
But in v5, the full swizzle value is used. The commit message doesn't explain this asymmetry. If this is intentional (MDSS v4 hardware only has a 1-bit swizzle field), it deserves a comment.

Carries `Fixes:` tag, which is appropriate.

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