From mboxrd@z Thu Jan  1 00:00:00 1970
From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/tyr: clear reset IRQ before soft reset
Date: Sat, 14 Mar 2026 07:15:46 +1000
Message-ID: <review-patch1-20260313091646.16938-2-work@onurozkan.dev>
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References: <20260313091646.16938-1-work@onurozkan.dev> <20260313091646.16938-2-work@onurozkan.dev>
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Patch Review

**Verdict: Looks good.**

This is a straightforward and correct fix. Clearing `RESET_COMPLETED` from `GPU_IRQ_CLEAR` before issuing `GPU_CMD_SOFT_RESET` prevents the subsequent `poll::read_poll_timeout` from seeing stale status from a previous reset cycle.

```rust
+    // Clear any stale reset-complete IRQ state before issuing a new soft reset.
+    regs::GPU_IRQ_CLEAR.write(dev, iomem, regs::GPU_IRQ_RAWSTAT_RESET_COMPLETED)?;
     regs::GPU_CMD.write(dev, iomem, regs::GPU_CMD_SOFT_RESET)?;
```

This matches the pattern used by `panfrost_gpu_soft_reset()` as the commit message states. No issues.

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