From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/dp: fix HPD state status bit shift value Date: Mon, 16 Mar 2026 12:12:55 +1000 Message-ID: In-Reply-To: <20260314-hpd-refactor-v5-1-0c8450737d64@oss.qualcomm.com> References: <20260314-hpd-refactor-v5-0-0c8450737d64@oss.qualcomm.com> <20260314-hpd-refactor-v5-1-0c8450737d64@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Straightforward register fix. The HPD_INT_STATUS register has a 3-bit field in bits [31:29] (mask 0x7, shift 0x1D) rather than 4-bit in [31:28] (mask 0xF, shift 0x1C). The Fixes tag is appropriate. No issues. --- Generated by Claude Code Patch Reviewer