From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/panthor: Pass an iomem pointer to GPU register access helpers Date: Mon, 13 Apr 2026 19:05:51 +1000 Message-ID: In-Reply-To: <20260412142951.2309135-2-karunika.choo@arm.com> References: <20260412142951.2309135-1-karunika.choo@arm.com> <20260412142951.2309135-2-karunika.choo@arm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review **Status: Good. Acked-by Boris Brezillon.** This is the foundational change. The `gpu_read`/`gpu_write` helpers change = from taking `struct panthor_device *` to `void __iomem *`: ```c -static inline u32 gpu_read(struct panthor_device *ptdev, u32 reg) +static inline u32 gpu_read(void __iomem *iomem, u32 reg) { - return readl(ptdev->iomem + reg); + return readl(iomem + reg); } ``` All callers are updated to pass `ptdev->iomem` where they previously passed= `ptdev`. This is a pure mechanical transformation with no behavioral chang= e. The `read_poll_timeout` / `read_poll_timeout_atomic` call sites are also up= dated correctly =E2=80=94 passing `ptdev->iomem` as the argument to `gpu_re= ad`: ```c ret =3D read_poll_timeout(gpu_read, val, val & MCU_STATUS_DISABLED, - 100, 1000, false, ptdev, + 100, 1000, false, ptdev->iomem, MCU_CONTROL); ``` No issues. --- --- Generated by Claude Code Patch Reviewer