From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/print: describe 6th & 9th bit of drm.debug Date: Mon, 25 May 2026 19:48:10 +1000 Message-ID: In-Reply-To: <20260521155231.1821935-2-michal.grzelak@intel.com> References: <20260521155231.1821935-1-michal.grzelak@intel.com> <20260521155231.1821935-2-michal.grzelak@intel.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review **Correctness: Good.** The patch correctly adds the two missing bit descrip= tions to `MODULE_PARM_DESC`. Verified against the kernel tree: The enum `drm_debug_category` in `include/drm/drm_print.h:98-142` defines e= ntries in order: `DRM_UT_CORE`(0), `DRM_UT_DRIVER`(1), `DRM_UT_KMS`(2), `DR= M_UT_PRIME`(3), `DRM_UT_ATOMIC`(4), `DRM_UT_VBL`(5), `DRM_UT_STATE`(6), `DR= M_UT_LEASE`(7), `DRM_UT_DP`(8), `DRM_UT_DRMRES`(9). The `DECLARE_DYNDBG_CLA= SSMAP` at `drm_print.c:60` confirms the same order. The existing `MODULE_PA= RM_DESC` was indeed missing bit 6 (`STATE`) and bit 9 (`DRMRES`). The added lines: ``` +"\t\tBit 6 (0x40) will enable STATE messages (atomic state code)\n" ... +"\t\tBit 9 (0x200) will enable DRMRES messages (managed resources code)"); ``` These match the enum doc: `DRM_UT_STATE` is "verbose atomic state debugging= " and `DRM_UT_DRMRES` is "drm managed resources code". The descriptions are= consistent. The change from `0x1ff` to `0x3ff` in `include/drm/drm_print.h:90` is also = correct: with 10 categories (bits 0-9), all-bits-set is `0x3ff`, not `0x1ff= ` (which only covers bits 0-8). This was already wrong before `DRM_UT_DRMRE= S` was added =E2=80=94 the comment was stale. **No issues found.** --- Generated by Claude Code Patch Reviewer