From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: dt-bindings: display: rockchip: analogix-dp: Fix hclk as third clock for RK3588 Date: Tue, 26 May 2026 07:12:11 +1000 Message-ID: In-Reply-To: <20260525125331.140059-2-damon.ding@rock-chips.com> References: <20260525125331.140059-1-damon.ding@rock-chips.com> <20260525125331.140059-2-damon.ding@rock-chips.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Clean approach. The top-level `clock-names` allows both `grf` and `hclk` via enum, with per-SoC allOf constraints controlling the count: ```yaml - enum: - grf - hclk ``` The per-SoC constraints enforce clock count (2 for RK3288, 3 for RK3399/RK3588) but don't constrain *which* third clock name each SoC must use. In theory, someone could write `"grf"` as the third clock for RK3588 and the binding would still pass. The driver implicitly enforces correctness (it looks for `"hclk"` specifically), but the schema doesn't. This is a minor observation and not blocking -- tightening this would add significant YAML complexity for little practical gain since the canonical DTS uses the right names. No issues. --- Generated by Claude Code Patch Reviewer