From mboxrd@z Thu Jan  1 00:00:00 1970
From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: accel/ivpu: Remove disable_d0i3_msg workaround
Date: Wed, 27 May 2026 14:51:17 +1000
Message-ID: <review-patch1-20260526125521.594479-1-andrzej.kacprowski@linux.intel.com>
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Patch Review

**Verdict: Looks good.**

**ivpu_drv.h changes:**
- Removes `bool disable_d0i3_msg;` from `struct ivpu_wa_table` =E2=80=94 co=
rrect, the field is no longer referenced anywhere.
- Removes `IVPU_TEST_MODE_D0I3_MSG_DISABLE BIT(4)` and `IVPU_TEST_MODE_D0I3=
_MSG_ENABLE BIT(5)` =E2=80=94 correct. Note that BIT(4) and BIT(5) are now =
unused in the test_mode space, which is fine since these are bitmask values=
 and the remaining bits (0-2, 6, 8, 9) keep their positions.

**ivpu_fw.c changes:**
- The entire `ivpu_fw_init_wa()` function is removed. I confirmed via grep =
that `disable_d0i3_msg` was the **only** workaround handled in this functio=
n, so removing the whole function is correct. If this function had handled =
other workarounds, removing it would have been a bug.
- The call `ivpu_fw_init_wa(vdev)` in `ivpu_fw_init()` is removed =E2=80=94=
 matches the function removal.
- The conditional:
  ```c
  if (!IVPU_WA(disable_d0i3_msg))
      boot_params->d0i3_delayed_entry =3D 1;
  ```
  is simplified to:
  ```c
  boot_params->d0i3_delayed_entry =3D 1;
  ```
  This unconditionally enables delayed entry, which the commit message expl=
ains is the only correct mode for all supported firmware.
- Copyright year bump 2025 =E2=86=92 2026 is appropriate.

**Minor style nit:** The removal of `ivpu_fw_init_wa()` leaves a double bla=
nk line (line 348 in the original has `}` closing `ivpu_fw_release`, then t=
wo blank lines before `static int ivpu_fw_mem_init`). This is visible in th=
e diff context. Linux kernel style prefers a single blank line between func=
tions. Very minor, not a blocker.

**ivpu_jsm_msg.c changes:**
- Removes the early return guard:
  ```c
  if (IVPU_WA(disable_d0i3_msg))
      return 0;
  ```
  This means `ivpu_jsm_pwr_d0i3_enter()` will now always send the IPC messa=
ge. This is correct =E2=80=94 with the workaround removed, the D0i3 entry m=
essage should always be sent.

**vpu_boot_api.h changes:**
- `VPU_BOOT_API_VER_PATCH` bumped from 4 to 5. This is a documentation-only=
 change to the API header (the patch version tracks header formatting/comme=
nt changes, not ABI changes), which is appropriate since the comment for `d=
0i3_delayed_entry` is being updated.
- The comment update adds a deprecation note:
  ```c
  * NOTE: This parameter is deprecated starting NPU50xx+. Bit 0 is now hard=
coded to 1,
  * meaning CPU state save always requires IPC message on D0i3 entry flow.
  ```
  This is good documentation. Also fixes a minor formatting inconsistency (=
`Bit0:` =E2=86=92 `Bit 0:`) for readability.

**Overall:** Clean patch, no functional or correctness issues. The only min=
or observation is the double blank line left after removing `ivpu_fw_init_w=
a()`, but that's trivial.

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Generated by Claude Code Patch Reviewer