From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: dt-bindings: display: rockchip: analogix-dp: Fix hclk as third clock for RK3588 Date: Thu, 04 Jun 2026 14:37:01 +1000 Message-ID: In-Reply-To: <20260601065100.1103873-2-damon.ding@rock-chips.com> References: <20260601065100.1103873-1-damon.ding@rock-chips.com> <20260601065100.1103873-2-damon.ding@rock-chips.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Good approach using per-compatible `allOf`/`if`/`then` blocks to enforce the correct third clock name per SoC. The top-level `clock-names` properly allows both `grf` and `hclk` as the third entry: ```yaml - enum: - grf - hclk ``` Then individual compatible constraints lock each SoC to the correct name. The RK3288 constraint correctly sets `maxItems: 2` to prevent a third clock. RK3399 mandates `grf`, RK3588 mandates `hclk`. Well done. The Fixes tag is appropriate since the original RK3588 binding didn't enforce the correct clock name. No issues. --- Generated by Claude Code Patch Reviewer