From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: gpu: nova-core: mm: Add GpuMm centralized memory manager Date: Wed, 01 Apr 2026 07:33:01 +1000 Message-ID: In-Reply-To: <20260311004008.2208806-11-joelagnelf@nvidia.com> References: <20260311004008.2208806-1-joelagnelf@nvidia.com> <20260311004008.2208806-11-joelagnelf@nvidia.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Well-structured bitfield definitions for MMU v2. The dual PDE handling (128-bit entries with big+small page table pointers) is correct. **Good:** The comment in `DualPde::new_small` about why the big portion is set to 0 rather than `Pde::invalid()` is valuable: ```rust /// According to hardware documentation, clearing bit 0 of the 128-bit /// entry makes the PDE behave as a "normal" PDE. Using `Pde::invalid()` /// would set bit 0 (valid_inverted), which breaks page table walking. ``` **Observation:** The PTE has overlapping bit fields (`frame_number_sys` at 53:8 and `frame_number_vid` at 32:8). This is intentional -- v2 uses different bit ranges depending on aperture. The `frame_number()` method correctly dispatches based on aperture type. --- Generated by Claude Code Patch Reviewer