From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: gpu: nova-core: mm: Add MMU v2 page table types Date: Tue, 28 Apr 2026 15:32:01 +1000 Message-ID: In-Reply-To: <20260425211454.174696-11-joelagnelf@nvidia.com> References: <20260425211454.174696-1-joelagnelf@nvidia.com> <20260425211454.174696-11-joelagnelf@nvidia.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Adds v2-specific bitfield types (`Pte`, `Pde`, `DualPde`, `VirtualAddressV2= `). The overlapping bit ranges in `Pte` (separate `frame_number_sys` and `f= rame_number_vid` fields) are correct for NVIDIA hardware where interpretati= on depends on aperture type. **Issue =E2=80=94 potential cross-patch compilability:** The `VaLevelIndex`= implementation returns raw `Bounded` values. Patch 11 (v3) fixes this by a= dding `.get()` calls to the v2 impl. This means patch 10 may not compile in= dependently, breaking bisectability. The `DualPde::new_small` correctly uses `Pde::new(0)` rather than `Pde::inv= alid()` for the big half =E2=80=94 the inverted valid-bit semantics are wel= l-documented. --- Generated by Claude Code Patch Reviewer