From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/a6xx+: Add support to configure perfcntrs Date: Sat, 16 May 2026 15:20:24 +1000 Message-ID: In-Reply-To: <20260511130017.96867-12-robin.clark@oss.qualcomm.com> References: <20260511130017.96867-1-robin.clark@oss.qualcomm.com> <20260511130017.96867-12-robin.clark@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review The `a6xx_perfcntr_configure()` implementation looks correct. The approach of configuring from the RB to handle aperture and idle requirements is sound. The `perfcntr_fence` mechanism via `CP_MEM_WRITE` + `rbmemptr` for coordinating between the CPU sel_worker and the GPU-side RB execution is well thought out. The function is wired into all four funcs tables (a6xx, a6xx_gmuwrapper, a7xx, a8xx). Correct. --- Generated by Claude Code Patch Reviewer