From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/a6xx+: Add support to configure perfcntrs Date: Mon, 25 May 2026 18:21:41 +1000 Message-ID: In-Reply-To: <20260522173349.55491-12-robin.clark@oss.qualcomm.com> References: <20260522173349.55491-1-robin.clark@oss.qualcomm.com> <20260522173349.55491-12-robin.clark@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review The `a6xx_perfcntr_configure` function handles pipe switching (`BR`/`BV`/`BOTH`) and writes SEL regs via `OUT_PKT4`. After configuring, it writes the `perfcntr_fence` and flushes: ```c OUT_PKT7(ring, CP_MEM_WRITE, 3); OUT_RING(ring, lower_32_bits(rbmemptr(ring, perfcntr_fence))); OUT_RING(ring, upper_32_bits(rbmemptr(ring, perfcntr_fence))); OUT_RING(ring, stream->sel_fence); ``` This fence mechanism lets `sample_worker` know when SEL reg programming is complete. Good design. --- Generated by Claude Code Patch Reviewer