From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/rockchip: analogix_dp: Add support for RK3576 Date: Thu, 04 Jun 2026 14:37:03 +1000 Message-ID: In-Reply-To: <20260601065100.1103873-12-damon.ding@rock-chips.com> References: <20260601065100.1103873-1-damon.ding@rock-chips.com> <20260601065100.1103873-12-damon.ding@rock-chips.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Adds the platform chip_data and OF match entry: ```c +static const struct rockchip_dp_chip_data rk3576_edp[] = { + { + .chip_type = RK3576_EDP, + .reg = 0x27dc0000, + }, + { /* sentinel */ } +}; ``` **Observation**: Unlike RK3588's chip_data which includes `.edp_mode = GRF_REG_FIELD(0x0000, 0, 0)`, the RK3576 entry has no `edp_mode` field. This means in `rockchip_dp_poweron()`, the call to `rockchip_grf_field_write(dp->grf, &dp->data->edp_mode, 1)` will be a no-op because `field->valid` is false (zero-initialized). This is safe due to the `valid` check, but it would be worth confirming whether RK3576 truly doesn't need an edp_mode GRF write for the video datapath, or if this is an oversight. The cover letter says "RK3576 integrates an eDP TX controller compatible with the existing RK3588 hardware design" which might suggest it should have one. Similarly, the `lcdc_sel` field is not set, matching the RK3588 behavior (RK3588 also lacks `lcdc_sel`). Has Reviewed-by from Nicolas Frattaroli and Luca Ceresoli. No blocking issues. --- Generated by Claude Code Patch Reviewer