From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/a8xx: Add perfcntr flush sequence Date: Mon, 25 May 2026 21:26:30 +1000 Message-ID: In-Reply-To: <20260520162454.18391-13-robin.clark@oss.qualcomm.com> References: <20260520162454.18391-1-robin.clark@oss.qualcomm.com> <20260520162454.18391-13-robin.clark@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Clean a8xx-specific implementation. The `wmb()` before polling is correct for ensuring the flush command writes are posted before reading status. The 100ms timeout seems reasonable for hardware flush. --- Generated by Claude Code Patch Reviewer