From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/ast: dp501: Fix open-coded register access
Date: Wed, 25 Mar 2026 07:46:42 +1000 [thread overview]
Message-ID: <review-patch14-20260323160407.245773-15-tzimmermann@suse.de> (raw)
In-Reply-To: <20260323160407.245773-15-tzimmermann@suse.de>
Patch Review
Good cleanup of `ast_init_dvo()` and `ast_init_analog()`. The conversion from `ast_read32`/`ast_write32` (which use raw P2A-mapped offsets) to `ast_mindwm`/`ast_moutdwm` (which handle segment selection) is correct.
**Important behavioral change in `ast_init_analog()`**: The old code wrote the SCU protection key 3 times:
```c
ast_write32(ast, 0x12000, 0x1688a8a8);
ast_write32(ast, 0x12000, 0x1688a8a8);
ast_write32(ast, 0x12000, 0x1688a8a8);
```
The new code uses `ast_moutdwm_poll`:
```c
ast_moutdwm_poll(ast, AST_REG_SCU000, AST_REG_SCU000_PROTECTION_KEY, 0x01);
```
This writes the key once and polls until the register reads 0x01 (unlocked). This is semantically different - the old code retried the write 3 times (perhaps as a reliability measure), while the new code writes once and polls. Since `ast_moutdwm_poll` is write-then-poll, if the hardware needs multiple writes, this could be a regression. However, since this was smoke-tested on hardware and the protection key mechanism typically just needs a single correct write, this should be fine.
Also in `ast_init_dvo()`: The old code had a P2A bridge setup sequence (`ast_write32(ast, 0xf004, AST_REG_MCR00)` etc.) that is removed because `ast_moutdwm` handles segment selection internally. But the old code wrote `0x1e6e0000` (MCR base) to the P2A window and then wrote `0x1688a8a8` to offset `0x12000` - which is SCU000 (0x1e6e2000) since 0x12000 = 0x10000 + 0x2000. Wait - that doesn't match: with P2A set to MCR (0x1e6e0000), the window at 0x10000 maps to 0x1e6e0000, so 0x12000 = 0x10000 + 0x2000 would be 0x1e6e2000 = SCU000. That's correct. The new code uses `ast_moutdwm(ast, AST_REG_SCU000, ...)` which will re-select the segment to SCU. Correct.
---
Generated by Claude Code Patch Reviewer
next prev parent reply other threads:[~2026-03-24 21:46 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 15:56 [PATCH 00/15] drm/ast: Clean up access to MMIO registers Thomas Zimmermann
2026-03-23 15:56 ` [PATCH 01/15] drm/ast: dp501: Fix initialization of SCU2C Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 02/15] drm/ast: Move 32-bit register-access helpers to ast_drv.{c, h} Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 03/15] drm/ast: Use constants for AHBC registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 04/15] drm/ast: Use constants for MCR registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 05/15] drm/ast: Use constants for SCU registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 06/15] drm/ast: Use constants for A2P registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 07/15] drm/ast: Use constants for WDT registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 08/15] drm/ast: Use constants for SDRAM registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 09/15] drm/ast: Store register addresses in struct ast_dramstruct Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 10/15] drm/ast: Gen1: Fix open-coded register access Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 11/15] drm/ast: Gen2: " Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 12/15] drm/ast: Gen4: " Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 13/15] drm/ast: Gen6: " Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 15:56 ` [PATCH 14/15] drm/ast: dp501: " Thomas Zimmermann
2026-03-24 21:46 ` Claude Code Review Bot [this message]
2026-03-23 15:56 ` [PATCH 15/15] drm/ast: Fix open-coded scu_rev access Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
2026-03-23 16:08 ` [PATCH 00/15] drm/ast: Clean up access to MMIO registers Thomas Zimmermann
2026-03-24 21:46 ` Claude review: " Claude Code Review Bot
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