From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/exynos: exynos_dp: Apply analogix_dp_finish_probe() Date: Sun, 12 Apr 2026 11:37:41 +1000 Message-ID: In-Reply-To: <20260409071908.466294-2-damon.ding@rock-chips.com> References: <20260409065301.446670-1-damon.ding@rock-chips.com> <20260409071908.466294-2-damon.ding@rock-chips.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Applies `analogix_dp_finish_probe()` on the Exynos side. The probe logic now: - Uses `of_get_display_timings()` to check for display-timings DT node - If present, creates an of-display-mode-bridge and stores it in `next_bridge` - If panel/bridge was already discovered, calls `component_add()` directly - Otherwise, delegates to `analogix_dp_finish_probe()` for AUX bus probing The logic `if (dp->plat_data.panel || dp->plat_data.next_bridge)` determining whether to call `component_add()` directly vs `analogix_dp_finish_probe()` is correct: if we already know the downstream device, skip the AUX bus probing. No issues. --- Generated by Claude Code Patch Reviewer