From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: ti: k3-am62p-j722s-common-main: Add support for DSS Date: Thu, 04 Jun 2026 16:54:13 +1000 Message-ID: In-Reply-To: <20260529-beagley-ai-display-v3-14-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> <20260529-beagley-ai-display-v3-14-7fefdc5d1adf@ideasonboard.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Adds DSS0, DSS1, OLDI, DPHY, and DSI nodes to the common dtsi. Also adds fi= xed-factor-clock dividers in the SoC-specific dtsi files (k3-am62p.dtsi and= k3-j722s.dtsi). **Observations:** - Both DSS0 and DSS1 use the same `ti,dpi-io-ctrl =3D <&main_conf 0x8300>`.= If there are separate DPI0_CLK_CTRL registers for the two DSS instances, t= his could be wrong. But it matches the series' description that DPI is shar= ed, so this may be correct for the hardware. - The DSI node uses `interrupt-parent =3D <&gic500>` explicitly =E2=80=94 t= his should not be necessary if the parent bus already uses the GIC as inter= rupt controller, but it's not harmful. - All nodes are `status =3D "disabled"` as expected for SoC-level dtsi. No blocking issues. --- Generated by Claude Code Patch Reviewer