From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/a6xx: Append SEL regs to dyn pwrup reglist Date: Thu, 07 May 2026 13:19:06 +1000 Message-ID: In-Reply-To: <20260506171127.133572-16-robin.clark@oss.qualcomm.com> References: <20260506171127.133572-1-robin.clark@oss.qualcomm.com> <20260506171127.133572-16-robin.clark@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review **Status: Minor issues** Adds `perfcntr_select()` helper that both emits ringbuffer commands and appends entries to the pwrup reglist for IFPC restoration. **Issue: `cpu_gpu_lock::regs` changed to flex array** ```c - uint64_t regs[62]; + uint64_t regs[]; ``` This changes the struct layout from fixed-size to flexible array member. Any code that does `sizeof(struct cpu_gpu_lock)` will now get a different (smaller) value. Check that nothing relies on `sizeof(struct cpu_gpu_lock)` to include the register space. The allocation in patch 14 uses `2 * PAGE_SIZE` directly, so it should be fine, but any other callers using `sizeof` would break. **Issue: No bounds checking on reglist writes** `perfcntr_select()` appends to the reglist without checking whether it has overflowed the `2 * PAGE_SIZE` allocation. While the commit message for patch 14 says the size is sufficient for ~190 counters on gen8, there's no runtime check. --- Generated by Claude Code Patch Reviewer