From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/a6xx: Allow IFPC with perfcntr stream Date: Mon, 25 May 2026 21:26:31 +1000 Message-ID: In-Reply-To: <20260520162454.18391-17-robin.clark@oss.qualcomm.com> References: <20260520162454.18391-1-robin.clark@oss.qualcomm.com> <20260520162454.18391-17-robin.clark@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Clean final patch. The `sysprof_setup(gpu, true/false)` bracketing in `samp= le_worker` temporarily inhibits IFPC only during register reads, which is t= he correct approach. The `msm_gpu_sysprof_no_ifpc()` simplification to only= check the legacy SYSPROF refcount (no longer checking for active perfcntr = stream) is correct because the kernel now handles IFPC itself via the force= _on mechanism. --- **Summary of actionable items**: 1. **Patch 13 (CRITICAL)**: `copy_from_user(&g, userptr, args->group_stride= )` =E2=80=94 no upper bound on `group_stride`, stack buffer overflow possib= le. Should use `min(args->group_stride, sizeof(g))`. 2. **Patch 13 (CRITICAL)**: `1 << args->bufsz_shift` =E2=80=94 undefined be= havior for large shift values. Validate `bufsz_shift` early (e.g., `bufsz_s= hift > 27` =E2=86=92 EINVAL). 3. **Patch 13 (bug)**: Non-blocking read on empty FIFO returns 0 instead of= `-EAGAIN`. 4. **Patch 10 (minor)**: `WARN_ON_ONCE(n > stream->nr_groups)` should be `>= =3D`. 5. **Patch 13 (minor)**: Include style should use angle brackets for kernel= headers. 6. **Patch 13 (minor)**: UAPI doc typo: "read from the has" =E2=86=92 "read= from the fd has". 7. **Patch 13 (minor)**: Counter allocation state not rolled back on partia= l failure in the ioctl loop. --- Generated by Claude Code Patch Reviewer