Claude review: drm/amd/pm: Use pm_display_cfg in legacy DPM (v2)

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

This is the main patch. It adds `amdgpu_dpm_get_display_cfg()` to populate the `pm_display_cfg` struct from legacy (non-DC) display state, and converts all legacy DPM consumers from the old `dpm.new_active_crtcs`/`dpm.new_active_crtc_count` fields to use `pm_display_cfg`.

**Observation (pre-existing upstream bug):** In `amdgpu_dpm_get_display_cfg()`, the `crtc_index` field is not initialized before the iteration loop:
```c
+	if (amdgpu_crtc->crtc_id < cfg->crtc_index) {
+		/* Find first active CRTC and its line time. */
+		cfg->crtc_index = amdgpu_crtc->crtc_id;
+		cfg->line_time_in_us = amdgpu_crtc->line_time;
+	}
```
Since `cfg` is `&adev->pm.pm_display_cfg` (zero-initialized from device struct allocation), `cfg->crtc_index` starts at 0. No `crtc_id` can be less than 0 (uint32_t), so this block will never execute on the first call. As a result, `line_time_in_us` remains 0. Compare with the DC code path in `dce110_clk_mgr.c:130` which correctly initializes `crtc_index` to `num_timing_generator` before the loop to act as a sentinel value. The non-DC path should similarly initialize `cfg->crtc_index` to a large value (e.g. `UINT_MAX`) at the start of the function. The same issue affects `cfg->vrefresh` which is not reset between calls.

However, this matches the upstream code exactly, so it is **not** a valid objection to this stable backport. The consumers in `si_upload_smc_data` guard against `line_time_in_us == 0`:
```c
+		if (cfg->line_time_in_us) {
+			mclk_change_block_cp_min = 200 / cfg->line_time_in_us;
+			mclk_change_block_cp_max = 100 / cfg->line_time_in_us;
```
so it won't cause a division by zero, just suboptimal MCLK switching behavior. Worth fixing upstream separately.

The conversion of `legacy_dpm.c` to conditionally call the new function only for non-DC:
```c
-	amdgpu_dpm_get_active_displays(adev);
+	if (!adev->dc_enabled)
+		amdgpu_dpm_get_display_cfg(adev);
```
is correct — when DC is enabled, DC already populates `pm_display_cfg` through its own path.

The changes in `si_dpm.c` and `kv_dpm.c` are mechanical replacements from old fields to new ones and look correct. The `amd_powerplay.c` change consolidates the previously inline display config population into the shared function, which is also correct.

The `NULL` pointer safety for `amdgpu_crtc->connector` in the new function relies on the `!amdgpu_crtc->enabled` check above, which is the same pattern used by the old code.

Overall: correct stable backport. The crtc_index initialization issue should be raised as a separate upstream fix.

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