* [PATCH 0/6] Enable new features for flipkart-rimob
@ 2026-03-08 15:52 Cristian Cozzolino via B4 Relay
2026-03-08 15:52 ` [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI Cristian Cozzolino via B4 Relay
` (6 more replies)
0 siblings, 7 replies; 21+ messages in thread
From: Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio
Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm,
~postmarketos/upstreaming, phone-devel, Cristian Cozzolino
This series enables a set of miscellaneous features for Billion Capture+
(a handset using the MSM8953 SoC released in 2017):
- Panel and GPU
- Touchscreen
- WiFi + Bluetooth
- Hall sensor
Patches 1 and 2 provide a driver for Novatek NT35532 and its corresponding
devicetree bindings, required for enabling panel in DTS. The remaining
patches are all DTS changes, aimed to enable the features listed above.
To: Neil Armstrong <neil.armstrong@linaro.org>
To: Jessica Zhang <jesszhan0024@gmail.com>
To: David Airlie <airlied@gmail.com>
To: Simona Vetter <simona@ffwll.ch>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: Maxime Ripard <mripard@kernel.org>
To: Thomas Zimmermann <tzimmermann@suse.de>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>
Cc: dri-devel@lists.freedesktop.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org
Cc: ~postmarketos/upstreaming@lists.sr.ht
Cc: phone-devel@vger.kernel.org
Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com>
---
Cristian Cozzolino (6):
dt-bindings: display: panel: Add Novatek NT35532 LCD DSI
drm/panel: Add driver for Novatek NT35532
arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU
arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth
arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen
arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor
.../bindings/display/panel/novatek,nt35532.yaml | 66 ++
MAINTAINERS | 6 +
.../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 152 ++++
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-novatek-nt35532.c | 767 +++++++++++++++++++++
6 files changed, 1003 insertions(+)
---
base-commit: 11439c4635edd669ae435eec308f4ab8a0804808
change-id: 20260303-rimob-new-features-037944b3a620
Best regards,
--
Cristian Cozzolino <cristian_ci@protonmail.com>
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI 2026-03-08 15:52 [PATCH 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 ` Cristian Cozzolino via B4 Relay 2026-03-08 16:13 ` Krzysztof Kozlowski 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay ` (5 subsequent siblings) 6 siblings, 2 replies; 21+ messages in thread From: Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel, Cristian Cozzolino From: Cristian Cozzolino <cristian_ci@protonmail.com> Document Novatek NT35532-based DSI display panel. Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> --- .../bindings/display/panel/novatek,nt35532.yaml | 66 ++++++++++++++++++++++ MAINTAINERS | 5 ++ 2 files changed, 71 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml new file mode 100644 index 000000000000..de11cce83b40 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/novatek,nt35532.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Novatek NT35532-based DSI display panels + +maintainers: + - Cristian Cozzolino <cristian_ci@protonmail.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: novatek,nt35532 + + reg: + maxItems: 1 + + backlight: true + reset-gpios: true + + vsn-supply: + description: negative voltage supply for analog circuits + vsp-supply: + description: positive voltage supply for analog circuits + + port: true + +required: + - compatible + - reg + - reset-gpios + - vsn-supply + - vsp-supply + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "novatek,nt35532"; + reg = <0>; + + backlight = <&pmi8950_wled>; + reset-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + vsn-supply = <&ibb>; + vsp-supply = <&lab>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 61bf550fd37c..12243feb0b27 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8139,6 +8139,11 @@ T: git https://gitlab.freedesktop.org/drm/misc/kernel.git F: Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml F: drivers/gpu/drm/panel/panel-novatek-nt35510.c +DRM DRIVER FOR NOVATEK NT35532 PANELS +M: Cristian Cozzolino <cristian_ci@protonmail.com> +S: Maintained +F: Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml + DRM DRIVER FOR NOVATEK NT35560 PANELS M: Linus Walleij <linusw@kernel.org> S: Maintained -- 2.52.0 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI 2026-03-08 15:52 ` [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI Cristian Cozzolino via B4 Relay @ 2026-03-08 16:13 ` Krzysztof Kozlowski 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Krzysztof Kozlowski @ 2026-03-08 16:13 UTC (permalink / raw) To: cristian_ci, Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel On 08/03/2026 16:52, Cristian Cozzolino via B4 Relay wrote: > + > + backlight: true > + reset-gpios: true > + > + vsn-supply: > + description: negative voltage supply for analog circuits Blank line > + vsp-supply: > + description: positive voltage supply for analog circuits Both are odd. Datasheet says vci, vddi, vddam and optional avdd, avee. There is no VSN and VSP. Otherwise please point the page in datasheet or some schematics. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 21+ messages in thread
* Claude review: dt-bindings: display: panel: Add Novatek NT35532 LCD DSI 2026-03-08 15:52 ` [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI Cristian Cozzolino via B4 Relay 2026-03-08 16:13 ` Krzysztof Kozlowski @ 2026-03-08 21:46 ` Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-08 21:46 UTC (permalink / raw) To: dri-devel-reviews Patch Review The binding uses a bare controller IC compatible: ```yaml compatible: const: novatek,nt35532 ``` The NT35532 is a display controller IC, not a specific panel. Following the established convention (e.g., `novatek,nt35510.yaml`), the compatible should include a panel-specific first entry with `novatek,nt35532` as a fallback: ```yaml compatible: items: - enum: - <panel-vendor>,<panel-model> - const: novatek,nt35532 ``` The DT bindings maintainers (Rob/Krzysztof/Conor) will very likely request this change. Even if the exact panel vendor/model is unknown, using the board/device name (e.g., `flipkart,rimob-panel`) as the first compatible is the expected practice. This allows future kernel changes if different NT35532-based panels need different init sequences. The rest of the binding looks fine: `vsn-supply`/`vsp-supply` naming for negative/positive analog supplies, required properties, and the example are all reasonable. The MAINTAINERS entry is fine, with the driver file path correctly added in patch 2. --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 2/6] drm/panel: Add driver for Novatek NT35532 2026-03-08 15:52 [PATCH 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay 2026-03-08 15:52 ` [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 ` Cristian Cozzolino via B4 Relay 2026-03-08 19:27 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 3/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU Cristian Cozzolino via B4 Relay ` (4 subsequent siblings) 6 siblings, 2 replies; 21+ messages in thread From: Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel, Cristian Cozzolino From: Cristian Cozzolino <cristian_ci@protonmail.com> Add support for Novatek NT35532-based 1080p video mode DSI panel. Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> --- MAINTAINERS | 1 + drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-novatek-nt35532.c | 767 ++++++++++++++++++++++++++ 4 files changed, 780 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 12243feb0b27..d854804dc8cc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8143,6 +8143,7 @@ DRM DRIVER FOR NOVATEK NT35532 PANELS M: Cristian Cozzolino <cristian_ci@protonmail.com> S: Maintained F: Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml +F: drivers/gpu/drm/panel/panel-novatek-nt35532.c DRM DRIVER FOR NOVATEK NT35560 PANELS M: Linus Walleij <linusw@kernel.org> diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 307152ad7759..4eb9691ab552 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -500,6 +500,17 @@ config DRM_PANEL_NOVATEK_NT35510 around the Novatek NT35510 display controller, such as some Hydis panels. +config DRM_PANEL_NOVATEK_NT35532 + tristate "Novatek NT35532-based DSI video mode panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + select VIDEOMODE_HELPERS + select DRM_KMS_HELPER + help + Say Y or M here if you want to enable support for Novatek + NT35532-based 1080p video mode DSI panels. + config DRM_PANEL_NOVATEK_NT35560 tristate "Novatek NT35560 DSI command mode panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index aeffaa95666d..f2b3d9b7abee 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) += panel-newvision-nv3051d.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35532) += panel-novatek-nt35532.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35532.c b/drivers/gpu/drm/panel/panel-novatek-nt35532.c new file mode 100644 index 000000000000..51ba548d0a8b --- /dev/null +++ b/drivers/gpu/drm/panel/panel-novatek-nt35532.c @@ -0,0 +1,767 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree. + * Copyright (c) 2026 Cristian Cozzolino <cristian_ci@protonmail.com> + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/regulator/consumer.h> + +#include <drm/drm_mipi_dsi.h> +#include <drm/drm_modes.h> +#include <drm/drm_panel.h> +#include <drm/drm_probe_helper.h> + +struct novatek_nt35532 { + struct drm_panel panel; + struct mipi_dsi_device *dsi; + struct regulator_bulk_data *supplies; + struct gpio_desc *reset_gpio; +}; + +static const struct regulator_bulk_data nt35532_supplies[] = { + { .supply = "vsn" }, + { .supply = "vsp" }, +}; + +static inline struct novatek_nt35532 *to_novatek_nt35532(struct drm_panel *panel) +{ + return container_of(panel, struct novatek_nt35532, panel); +} + +static void nt35532_reset(struct novatek_nt35532 *ctx) +{ + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + usleep_range(10000, 11000); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + usleep_range(5000, 6000); + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + usleep_range(10000, 11000); +} + +static int nt35532_on(struct novatek_nt35532 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x13); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x05); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x31); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0x7e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0x55); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x50); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0xd0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x6b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x6b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x63); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x3c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x5c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x60); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0xca); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0xd5); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0xf0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0xab); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x44); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x05); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x03, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x38); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0x19); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x08, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x09, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x1d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0b, 0x17); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x13, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x14, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x18, 0x38); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x19, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1a, 0x1a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1b, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1c, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1d, 0x1c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1e, 0x16); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1f, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x20, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x21, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x22, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x23, 0x0a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x24, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x25, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x26, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x27, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x54, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x55, 0x07); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x56, 0x1a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x58, 0x19); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x59, 0x36); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5a, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0x32); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5e, 0x27); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x28); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0x2c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x62, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x63, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x64, 0x32); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x65, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x66, 0x44); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x67, 0x11); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x69, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6a, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6b, 0x22); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0xc0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x09); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0x11); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x14); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x61); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x30); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0xb0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x0a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0xda); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0xff); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xf4); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x40); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x7f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x16); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0x53); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x2a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0xf0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0x3b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x13); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x2a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x92); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x88); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xed, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xee, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xef, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfa, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x75, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x76, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x77, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7a, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7b, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7c, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x82, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x83, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x84, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x85, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x86, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x87, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x88, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x89, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8a, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8c, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x93, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x94, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x95, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9e, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa0, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa3, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa4, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa5, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa6, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xad, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb8, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbb, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xda, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdb, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdc, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdd, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xde, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe0, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe3, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe4, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe5, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe6, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe7, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe8, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xea, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xeb, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xec, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xed, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xee, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xef, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf2, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf4, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf6, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf8, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfa, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x03, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x08, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x09, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0b, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x13, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x14, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x18, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x19, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1a, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1b, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1c, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1d, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1e, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1f, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x20, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x21, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x22, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x23, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x24, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x25, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x26, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x27, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x28, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x29, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2a, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2b, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2f, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x30, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x31, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x32, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x33, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x34, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x35, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x36, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x37, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x38, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x39, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3a, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3b, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3f, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x40, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x41, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x42, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x43, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x44, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x45, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x46, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x47, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x48, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x49, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4a, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4b, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4c, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4d, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4e, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4f, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x50, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x51, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x52, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x53, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x54, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x55, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x56, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x58, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x59, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5a, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5e, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x62, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x63, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x64, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x65, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x66, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x67, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x69, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6a, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6b, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x70, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x71, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x72, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x73, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x74, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x75, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x76, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x77, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7a, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7b, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7c, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x82, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x83, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x84, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x85, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x86, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x87, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x88, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x89, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8a, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8c, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x93, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x94, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x95, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9e, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa0, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa3, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa4, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa5, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa6, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xad, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb8, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbb, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xda, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdb, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdc, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdd, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xde, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe0, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe3, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe4, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe5, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe6, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe7, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe8, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xea, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0xee); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x40, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x41, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x42, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x35, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x36, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x48); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x00); + mipi_dsi_msleep(&dsi_ctx, 120); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x29, 0x00); + mipi_dsi_msleep(&dsi_ctx, 50); + + return dsi_ctx.accum_err; +} + +static int nt35532_off(struct novatek_nt35532 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; + + mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 50); + mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 120); + + return dsi_ctx.accum_err; +} + +static int nt35532_prepare(struct drm_panel *panel) +{ + struct novatek_nt35532 *ctx = to_novatek_nt35532(panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + ret = regulator_bulk_enable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + if (ret < 0) { + dev_err(dev, "Failed to enable regulators: %d\n", ret); + return ret; + } + + nt35532_reset(ctx); + + ret = nt35532_on(ctx); + if (ret < 0) { + dev_err(dev, "Failed to initialize panel: %d\n", ret); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + return ret; + } + + return 0; +} + +static int nt35532_unprepare(struct drm_panel *panel) +{ + struct novatek_nt35532 *ctx = to_novatek_nt35532(panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + ret = nt35532_off(ctx); + if (ret < 0) + dev_err(dev, "Failed to un-initialize panel: %d\n", ret); + + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + + return 0; +} + +static const struct drm_display_mode nt35532_mode = { + .clock = (1080 + 100 + 6 + 94) * (1920 + 15 + 6 + 10) * 60 / 1000, + .hdisplay = 1080, + .hsync_start = 1080 + 100, + .hsync_end = 1080 + 100 + 6, + .htotal = 1080 + 100 + 6 + 94, + .vdisplay = 1920, + .vsync_start = 1920 + 15, + .vsync_end = 1920 + 15 + 6, + .vtotal = 1920 + 15 + 6 + 10, + .width_mm = 68, + .height_mm = 121, + .type = DRM_MODE_TYPE_DRIVER, +}; + +static int nt35532_get_modes(struct drm_panel *panel, + struct drm_connector *connector) +{ + return drm_connector_helper_get_modes_fixed(connector, &nt35532_mode); +} + +static const struct drm_panel_funcs novatek_nt35532_panel_funcs = { + .prepare = nt35532_prepare, + .unprepare = nt35532_unprepare, + .get_modes = nt35532_get_modes, +}; + +static int nt35532_probe(struct mipi_dsi_device *dsi) +{ + struct device *dev = &dsi->dev; + struct novatek_nt35532 *ctx; + int ret; + + ctx = devm_drm_panel_alloc(dev, struct novatek_nt35532, panel, + &novatek_nt35532_panel_funcs, + DRM_MODE_CONNECTOR_DSI); + if (IS_ERR(ctx)) + return PTR_ERR(ctx); + + ret = devm_regulator_bulk_get_const(dev, + ARRAY_SIZE(nt35532_supplies), + nt35532_supplies, + &ctx->supplies); + if (ret < 0) + return ret; + + ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(ctx->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), + "Failed to get reset-gpios\n"); + + ctx->dsi = dsi; + mipi_dsi_set_drvdata(dsi, ctx); + + dsi->lanes = 4; + dsi->format = MIPI_DSI_FMT_RGB888; + dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_LPM; + + ctx->panel.prepare_prev_first = true; + + ret = drm_panel_of_backlight(&ctx->panel); + if (ret) + return dev_err_probe(dev, ret, "Failed to get backlight\n"); + + drm_panel_add(&ctx->panel); + + ret = mipi_dsi_attach(dsi); + if (ret < 0) { + drm_panel_remove(&ctx->panel); + return dev_err_probe(dev, ret, "Failed to attach to DSI host\n"); + } + + return 0; +} + +static void nt35532_remove(struct mipi_dsi_device *dsi) +{ + struct novatek_nt35532 *ctx = mipi_dsi_get_drvdata(dsi); + int ret; + + ret = mipi_dsi_detach(dsi); + if (ret < 0) + dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret); + + drm_panel_remove(&ctx->panel); +} + +static const struct of_device_id nt35532_of_match[] = { + { .compatible = "novatek,nt35532" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, nt35532_of_match); + +static struct mipi_dsi_driver nt35532_driver = { + .probe = nt35532_probe, + .remove = nt35532_remove, + .driver = { + .name = "panel-novatek-nt35532", + .of_match_table = nt35532_of_match, + }, +}; +module_mipi_dsi_driver(nt35532_driver); + +MODULE_DESCRIPTION("DRM driver for Novatek NT35532-based 1080p video mode DSI panel"); +MODULE_LICENSE("GPL"); -- 2.52.0 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 2/6] drm/panel: Add driver for Novatek NT35532 2026-03-08 15:52 ` [PATCH 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay @ 2026-03-08 19:27 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Dmitry Baryshkov @ 2026-03-08 19:27 UTC (permalink / raw) To: cristian_ci Cc: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio, dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel On Sun, Mar 08, 2026 at 04:52:42PM +0100, Cristian Cozzolino via B4 Relay wrote: > From: Cristian Cozzolino <cristian_ci@protonmail.com> > > Add support for Novatek NT35532-based 1080p video mode DSI panel. > > Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> > --- > MAINTAINERS | 1 + > drivers/gpu/drm/panel/Kconfig | 11 + > drivers/gpu/drm/panel/Makefile | 1 + > drivers/gpu/drm/panel/panel-novatek-nt35532.c | 767 ++++++++++++++++++++++++++ > 4 files changed, 780 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 12243feb0b27..d854804dc8cc 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -8143,6 +8143,7 @@ DRM DRIVER FOR NOVATEK NT35532 PANELS > M: Cristian Cozzolino <cristian_ci@protonmail.com> > S: Maintained > F: Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml > +F: drivers/gpu/drm/panel/panel-novatek-nt35532.c > > DRM DRIVER FOR NOVATEK NT35560 PANELS > M: Linus Walleij <linusw@kernel.org> > diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig > index 307152ad7759..4eb9691ab552 100644 > --- a/drivers/gpu/drm/panel/Kconfig > +++ b/drivers/gpu/drm/panel/Kconfig > @@ -500,6 +500,17 @@ config DRM_PANEL_NOVATEK_NT35510 > around the Novatek NT35510 display controller, such as some > Hydis panels. > > +config DRM_PANEL_NOVATEK_NT35532 > + tristate "Novatek NT35532-based DSI video mode panel" > + depends on OF > + depends on DRM_MIPI_DSI > + depends on BACKLIGHT_CLASS_DEVICE > + select VIDEOMODE_HELPERS > + select DRM_KMS_HELPER > + help > + Say Y or M here if you want to enable support for Novatek > + NT35532-based 1080p video mode DSI panels. > + > config DRM_PANEL_NOVATEK_NT35560 > tristate "Novatek NT35560 DSI command mode panel" > depends on OF > diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile > index aeffaa95666d..f2b3d9b7abee 100644 > --- a/drivers/gpu/drm/panel/Makefile > +++ b/drivers/gpu/drm/panel/Makefile > @@ -49,6 +49,7 @@ obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o > obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) += panel-newvision-nv3051d.o > obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o > obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o > +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35532) += panel-novatek-nt35532.o > obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o > obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o > obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o > diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35532.c b/drivers/gpu/drm/panel/panel-novatek-nt35532.c > new file mode 100644 > index 000000000000..51ba548d0a8b > --- /dev/null > +++ b/drivers/gpu/drm/panel/panel-novatek-nt35532.c > @@ -0,0 +1,767 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree. > + * Copyright (c) 2026 Cristian Cozzolino <cristian_ci@protonmail.com> > + */ > + > +#include <linux/delay.h> > +#include <linux/gpio/consumer.h> > +#include <linux/mod_devicetable.h> > +#include <linux/module.h> > +#include <linux/regulator/consumer.h> > + > +#include <drm/drm_mipi_dsi.h> > +#include <drm/drm_modes.h> > +#include <drm/drm_panel.h> > +#include <drm/drm_probe_helper.h> > + > +struct novatek_nt35532 { > + struct drm_panel panel; > + struct mipi_dsi_device *dsi; > + struct regulator_bulk_data *supplies; > + struct gpio_desc *reset_gpio; > +}; > + > +static const struct regulator_bulk_data nt35532_supplies[] = { > + { .supply = "vsn" }, > + { .supply = "vsp" }, > +}; > + > +static inline struct novatek_nt35532 *to_novatek_nt35532(struct drm_panel *panel) > +{ > + return container_of(panel, struct novatek_nt35532, panel); > +} > + > +static void nt35532_reset(struct novatek_nt35532 *ctx) > +{ > + gpiod_set_value_cansleep(ctx->reset_gpio, 0); > + usleep_range(10000, 11000); > + gpiod_set_value_cansleep(ctx->reset_gpio, 1); > + usleep_range(5000, 6000); > + gpiod_set_value_cansleep(ctx->reset_gpio, 0); > + usleep_range(10000, 11000); > +} > + > +static int nt35532_on(struct novatek_nt35532 *ctx) > +{ > + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; > + > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x13); > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); If this goes to be resent for any reason, could you please insert an empty line before 0xff, 0xNN wries? > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); [...] > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x00); I suppose this is MIPI_DCS_EXIT_SLEEP_MODE, > + mipi_dsi_msleep(&dsi_ctx, 120); > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x29, 0x00); MIPI_DCS_SET_DISPLAY_ON > + mipi_dsi_msleep(&dsi_ctx, 50); > + > + return dsi_ctx.accum_err; > +} > + -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 21+ messages in thread
* Claude review: drm/panel: Add driver for Novatek NT35532 2026-03-08 15:52 ` [PATCH 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay 2026-03-08 19:27 ` Dmitry Baryshkov @ 2026-03-08 21:46 ` Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-08 21:46 UTC (permalink / raw) To: dri-devel-reviews Patch Review **Init sequence uses generic writes for standard DCS commands.** At the end of `nt35532_on()`: ```c mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x00); mipi_dsi_msleep(&dsi_ctx, 120); mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x29, 0x00); mipi_dsi_msleep(&dsi_ctx, 50); ``` `0x11` is `MIPI_DCS_EXIT_SLEEP_MODE` and `0x29` is `MIPI_DCS_SET_DISPLAY_ON`. These should use the proper DCS helpers, consistent with how `nt35532_off()` already uses them: ```c mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); mipi_dsi_msleep(&dsi_ctx, 120); mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); mipi_dsi_msleep(&dsi_ctx, 50); ``` This is a common artifact of auto-generated drivers, but reviewers will ask for it to be fixed. **`#include <drm/drm_probe_helper.h>`** is included for `drm_connector_helper_get_modes_fixed()`. This is correct, but the corresponding `select DRM_KMS_HELPER` in Kconfig may be unnecessary — check whether `DRM_MIPI_DSI` already selects it transitively. Other recent panel drivers don't always add this select. **Structure and APIs are good:** - Uses `devm_drm_panel_alloc()` (the modern allocation API) - Uses `devm_regulator_bulk_get_const()` with a static supply array - Uses `mipi_dsi_multi_context` for the init sequence - Uses `drm_connector_helper_get_modes_fixed()` for mode reporting - `prepare_prev_first = true` is set correctly **Reset sequence looks correct** given `GPIO_ACTIVE_LOW` in the DTS: ```c gpiod_set_value_cansleep(ctx->reset_gpio, 0); // de-assert usleep_range(10000, 11000); gpiod_set_value_cansleep(ctx->reset_gpio, 1); // assert (reset pulse) usleep_range(5000, 6000); gpiod_set_value_cansleep(ctx->reset_gpio, 0); // de-assert usleep_range(10000, 11000); ``` **Minor:** The `MODULE_AUTHOR()` macro is missing. Not strictly required but conventional. --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 3/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU 2026-03-08 15:52 [PATCH 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay 2026-03-08 15:52 ` [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI Cristian Cozzolino via B4 Relay 2026-03-08 15:52 ` [PATCH 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 ` Cristian Cozzolino via B4 Relay 2026-03-08 15:01 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 4/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth Cristian Cozzolino via B4 Relay ` (3 subsequent siblings) 6 siblings, 2 replies; 21+ messages in thread From: Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel, Cristian Cozzolino From: Cristian Cozzolino <cristian_ci@protonmail.com> Add the description for the display panel found on this phone. And with this done we can also enable the GPU and set the zap shader firmware path. Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> --- .../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 80 ++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts index ef4faf763132..a00cf83dba93 100644 --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts @@ -78,6 +78,13 @@ vph_pwr: vph-pwr-regulator { }; }; +&gpu { + status = "okay"; +}; + +&gpu_zap_shader { + firmware-name = "qcom/msm8953/flipkart/rimob/a506_zap.mdt"; +}; &hsusb_phy { vdd-supply = <&pm8953_l3>; @@ -87,11 +94,69 @@ &hsusb_phy { status = "okay"; }; +&ibb { + qcom,discharge-resistor-kohms = <32>; +}; + +&lab { + qcom,soft-start-us = <800>; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&pm8953_s3>; + vddio-supply = <&pm8953_l6>; + + pinctrl-0 = <&mdss_default>; + pinctrl-1 = <&mdss_sleep>; + pinctrl-names = "default", "sleep"; + + status = "okay"; + + panel: panel@0 { + compatible = "novatek,nt35532"; + reg = <0>; + + backlight = <&pmi8950_wled>; + reset-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + vsp-supply = <&lab>; + vsn-supply = <&ibb>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply = <&pm8953_l3>; + + status = "okay"; +}; + &pm8953_resin { linux,code = <KEY_VOLUMEDOWN>; status = "okay"; }; +&pmi8950_wled { + qcom,current-limit-microamp = <10000>; + qcom,num-strings = <3>; + qcom,ovp-millivolt = <29500>; + + status = "okay"; +}; + &rpm_requests { regulators { compatible = "qcom,rpm-pm8953-regulators"; @@ -244,6 +309,21 @@ gpio_key_default: gpio-key-default-state { drive-strength = <2>; bias-pull-up; }; + + mdss_default: mdss-default-state { + pins = "gpio61"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + output-high; + }; + + mdss_sleep: mdss-sleep-state { + pins = "gpio61"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; }; &usb3 { -- 2.52.0 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 3/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU 2026-03-08 15:52 ` [PATCH 3/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU Cristian Cozzolino via B4 Relay @ 2026-03-08 15:01 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Dmitry Baryshkov @ 2026-03-08 15:01 UTC (permalink / raw) To: cristian_ci Cc: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio, dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel On Sun, Mar 08, 2026 at 04:52:43PM +0100, Cristian Cozzolino via B4 Relay wrote: > From: Cristian Cozzolino <cristian_ci@protonmail.com> > > Add the description for the display panel found on this phone. > And with this done we can also enable the GPU and set the zap shader > firmware path. > > Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> > --- > .../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 80 ++++++++++++++++++++++ > 1 file changed, 80 insertions(+) > > + > +&mdss_dsi0 { > + vdda-supply = <&pm8953_s3>; > + vddio-supply = <&pm8953_l6>; > + > + pinctrl-0 = <&mdss_default>; > + pinctrl-1 = <&mdss_sleep>; > + pinctrl-names = "default", "sleep"; It might be better to move pinctrl nodes to the panel device, because they control the panel reset pin (rather than some kind if DSI-related pin). Other than that LGTM. > + > + status = "okay"; > + > + panel: panel@0 { > + compatible = "novatek,nt35532"; > + reg = <0>; > + > + backlight = <&pmi8950_wled>; > + reset-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; > + vsp-supply = <&lab>; > + vsn-supply = <&ibb>; > + > + port { > + panel_in: endpoint { > + remote-endpoint = <&mdss_dsi0_out>; > + }; > + }; > + }; > +}; > + -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 21+ messages in thread
* Claude review: arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU 2026-03-08 15:52 ` [PATCH 3/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU Cristian Cozzolino via B4 Relay 2026-03-08 15:01 ` Dmitry Baryshkov @ 2026-03-08 21:46 ` Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-08 21:46 UTC (permalink / raw) To: dri-devel-reviews Patch Review This patch enables the display subsystem (MDSS, DSI, DSI PHY), panel, WLED backlight, IBB/LAB regulators, and GPU with zap shader. Looks clean and follows established patterns for MSM8953 display enablement. The DSI supplies, pinctrl states, panel node under `&mdss_dsi0`, and the `data-lanes` on the output endpoint all look correct. One small note: this patch adds both `&gpu` and `&gpu_zap_shader` — the commit message says "we can also enable the GPU" which accurately describes the combined scope. The firmware path `qcom/msm8953/flipkart/rimob/a506_zap.mdt` follows the vendor/board convention. --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 4/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth 2026-03-08 15:52 [PATCH 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay ` (2 preceding siblings ...) 2026-03-08 15:52 ` [PATCH 3/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 ` Cristian Cozzolino via B4 Relay 2026-03-08 15:08 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 5/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen Cristian Cozzolino via B4 Relay ` (2 subsequent siblings) 6 siblings, 2 replies; 21+ messages in thread From: Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel, Cristian Cozzolino From: Cristian Cozzolino <cristian_ci@protonmail.com> Configure and enable the WCNSS which provides WiFi and Bluetooth on this device using the WCN3660B chip. Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> --- arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts index a00cf83dba93..7b2849405462 100644 --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts @@ -333,3 +333,18 @@ &usb3 { &usb3_dwc3 { dr_mode = "peripheral"; }; + +&wcnss { + vddpx-supply = <&pm8953_l5>; + + status = "okay"; +}; + +&wcnss_iris { + compatible = "qcom,wcn3660b"; + + vddxo-supply = <&pm8953_l7>; + vddrfa-supply = <&pm8953_l19>; + vddpa-supply = <&pm8953_l9>; + vdddig-supply = <&pm8953_l5>; +}; -- 2.52.0 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 4/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth 2026-03-08 15:52 ` [PATCH 4/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth Cristian Cozzolino via B4 Relay @ 2026-03-08 15:08 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Dmitry Baryshkov @ 2026-03-08 15:08 UTC (permalink / raw) To: cristian_ci Cc: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio, dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel On Sun, Mar 08, 2026 at 04:52:44PM +0100, Cristian Cozzolino via B4 Relay wrote: > From: Cristian Cozzolino <cristian_ci@protonmail.com> > > Configure and enable the WCNSS which provides WiFi and Bluetooth on this > device using the WCN3660B chip. > > Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> > --- > arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 21+ messages in thread
* Claude review: arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth 2026-03-08 15:52 ` [PATCH 4/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth Cristian Cozzolino via B4 Relay 2026-03-08 15:08 ` Dmitry Baryshkov @ 2026-03-08 21:46 ` Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-08 21:46 UTC (permalink / raw) To: dri-devel-reviews Patch Review Simple and clean. Enables WCNSS with WCN3660B iris. The supply configuration (`vddpx`, `vddxo`, `vddrfa`, `vddpa`, `vdddig`) is standard for this chip. No issues. --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 5/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen 2026-03-08 15:52 [PATCH 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay ` (3 preceding siblings ...) 2026-03-08 15:52 ` [PATCH 4/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 ` Cristian Cozzolino via B4 Relay 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 6/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor Cristian Cozzolino via B4 Relay 2026-03-08 21:46 ` Claude review: Enable new features for flipkart-rimob Claude Code Review Bot 6 siblings, 1 reply; 21+ messages in thread From: Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel, Cristian Cozzolino From: Cristian Cozzolino <cristian_ci@protonmail.com> This device uses a Goodix GT5688 touch controller, connected to i2c_3. Add it to the device tree. Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> --- .../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts index 7b2849405462..709ea6fc9fbb 100644 --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts @@ -94,6 +94,31 @@ &hsusb_phy { status = "okay"; }; +&i2c_3 { + status = "okay"; + + touchscreen@5d { + compatible = "goodix,gt5688"; + reg = <0x5d>; + + interrupts-extended = <&tlmm 65 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 = <&tsp_int_rst_default>; + pinctrl-names = "default"; + + irq-gpios = <&tlmm 65 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; + + VDDIO-supply = <&pm8953_l6>; + AVDD28-supply = <&pm8953_l10>; + + touchscreen-size-x = <1080>; + touchscreen-size-y = <1920>; + touchscreen-inverted-x; + touchscreen-inverted-y; + }; +}; + &ibb { qcom,discharge-resistor-kohms = <32>; }; @@ -324,6 +349,13 @@ mdss_sleep: mdss-sleep-state { drive-strength = <2>; bias-pull-down; }; + + tsp_int_rst_default: tsp-int-rst-default-state { + pins = "gpio64", "gpio65"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; }; &usb3 { -- 2.52.0 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Claude review: arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen 2026-03-08 15:52 ` [PATCH 5/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen Cristian Cozzolino via B4 Relay @ 2026-03-08 21:46 ` Claude Code Review Bot 0 siblings, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-08 21:46 UTC (permalink / raw) To: dri-devel-reviews Patch Review Adds Goodix GT5688 on i2c_3 with the correct supply names (`VDDIO`, `AVDD28`) and interrupt/reset GPIO configuration. One minor note: the node has both `interrupts-extended` and `irq-gpios`. The `irq-gpios` is used by the Goodix driver for pin direction configuration during initialization, so both are needed — this is correct for Goodix touchscreens. The pinctrl state uses `drive-strength = <8>` and `bias-pull-up` for both interrupt and reset pins, which is reasonable. --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 6/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor 2026-03-08 15:52 [PATCH 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay ` (4 preceding siblings ...) 2026-03-08 15:52 ` [PATCH 5/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 ` Cristian Cozzolino via B4 Relay 2026-03-08 15:14 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 21:46 ` Claude review: Enable new features for flipkart-rimob Claude Code Review Bot 6 siblings, 2 replies; 21+ messages in thread From: Cristian Cozzolino via B4 Relay @ 2026-03-08 15:52 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel, Cristian Cozzolino From: Cristian Cozzolino <cristian_ci@protonmail.com> Enable the Hall effect sensor (flip cover) for Billion Capture+. The GPIO is mapped to SW_LID events as in other qcom devices. Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> --- .../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts index 709ea6fc9fbb..83812050a0a3 100644 --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts @@ -44,6 +44,24 @@ framebuffer@90001000 { }; }; + gpio-hall-sensor { + compatible = "gpio-keys"; + + pinctrl-0 = <&hall_sensor_default>; + pinctrl-names = "default"; + + label = "GPIO Hall Effect Sensor"; + + event-hall-sensor { + label = "Hall Effect Sensor"; + gpios = <&tlmm 46 GPIO_ACTIVE_LOW>; + linux,input-type = <EV_SW>; + linux,code = <SW_LID>; + linux,can-disable; + wakeup-source; + }; + }; + gpio-keys { compatible = "gpio-keys"; @@ -335,6 +353,13 @@ gpio_key_default: gpio-key-default-state { bias-pull-up; }; + hall_sensor_default: hall-sensor-default-state { + pins = "gpio46"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + mdss_default: mdss-default-state { pins = "gpio61"; function = "gpio"; -- 2.52.0 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 6/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor 2026-03-08 15:52 ` [PATCH 6/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor Cristian Cozzolino via B4 Relay @ 2026-03-08 15:14 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Dmitry Baryshkov @ 2026-03-08 15:14 UTC (permalink / raw) To: cristian_ci Cc: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio, dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel On Sun, Mar 08, 2026 at 04:52:46PM +0100, Cristian Cozzolino via B4 Relay wrote: > From: Cristian Cozzolino <cristian_ci@protonmail.com> > > Enable the Hall effect sensor (flip cover) for Billion Capture+. > The GPIO is mapped to SW_LID events as in other qcom devices. > > Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> > --- > .../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 25 ++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts > index 709ea6fc9fbb..83812050a0a3 100644 > --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts > +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts > @@ -44,6 +44,24 @@ framebuffer@90001000 { > }; > }; > > + gpio-hall-sensor { > + compatible = "gpio-keys"; Is there a reason to have a separate device for it? It can be squashed into the following gpio-keys. > + > + pinctrl-0 = <&hall_sensor_default>; > + pinctrl-names = "default"; > + > + label = "GPIO Hall Effect Sensor"; > + > + event-hall-sensor { > + label = "Hall Effect Sensor"; > + gpios = <&tlmm 46 GPIO_ACTIVE_LOW>; > + linux,input-type = <EV_SW>; > + linux,code = <SW_LID>; > + linux,can-disable; > + wakeup-source; > + }; > + }; > + > gpio-keys { > compatible = "gpio-keys"; > > @@ -335,6 +353,13 @@ gpio_key_default: gpio-key-default-state { > bias-pull-up; > }; > > + hall_sensor_default: hall-sensor-default-state { > + pins = "gpio46"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > + > mdss_default: mdss-default-state { > pins = "gpio61"; > function = "gpio"; > > -- > 2.52.0 > > -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 21+ messages in thread
* Claude review: arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor 2026-03-08 15:52 ` [PATCH 6/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor Cristian Cozzolino via B4 Relay 2026-03-08 15:14 ` Dmitry Baryshkov @ 2026-03-08 21:46 ` Claude Code Review Bot 1 sibling, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-08 21:46 UTC (permalink / raw) To: dri-devel-reviews Patch Review Standard `gpio-keys` hall sensor configuration. Uses `EV_SW`/`SW_LID`, `linux,can-disable`, and `wakeup-source` which is the correct pattern for hall sensors on Qualcomm phones. The `bias-disable` on the pinctrl is appropriate if the hall sensor has an external pull-up. No issues. --- **Summary of requested changes:** 1. **(Patch 1)** Add a panel-specific compatible string with `novatek,nt35532` as fallback in the binding 2. **(Patch 2)** Use `mipi_dsi_dcs_exit_sleep_mode_multi()` and `mipi_dsi_dcs_set_display_on_multi()` instead of generic writes for DCS commands 0x11 and 0x29 3. **(Patch 2, minor)** Verify whether `select DRM_KMS_HELPER` is actually needed or is already pulled in transitively --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
* Claude review: Enable new features for flipkart-rimob 2026-03-08 15:52 [PATCH 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay ` (5 preceding siblings ...) 2026-03-08 15:52 ` [PATCH 6/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor Cristian Cozzolino via B4 Relay @ 2026-03-08 21:46 ` Claude Code Review Bot 6 siblings, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-08 21:46 UTC (permalink / raw) To: dri-devel-reviews Overall Series Review Subject: Enable new features for flipkart-rimob Author: Cristian Cozzolino via B4 Relay <devnull+cristian_ci.protonmail.com@kernel.org> Patches: 12 Reviewed: 2026-03-09T07:46:25.867512 --- This is a 6-patch series enabling new features (display, GPU, WiFi/BT, touchscreen, hall sensor) for the Billion Capture+ handset (Flipkart rimob, MSM8953 SoC). The series is well-structured: DT binding first, then the panel driver, then DTS patches grouped by subsystem. The panel driver is clearly auto-generated by `linux-mdss-dsi-panel-driver-generator` and uses modern APIs (`devm_drm_panel_alloc`, `mipi_dsi_multi_context`). The DTS patches are straightforward and reasonable. There are a few issues that should be addressed before merging, primarily around the DT binding compatible and the panel driver's init sequence. --- --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v2 0/6] Enable new features for flipkart-rimob
@ 2026-03-18 22:28 Cristian Cozzolino via B4 Relay
2026-03-18 22:28 ` [PATCH v2 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay
0 siblings, 1 reply; 21+ messages in thread
From: Cristian Cozzolino via B4 Relay @ 2026-03-18 22:28 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio
Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm,
~postmarketos/upstreaming, phone-devel, Cristian Cozzolino,
Konrad Dybcio, Dmitry Baryshkov
This series enables a set of miscellaneous features for Billion Capture+
(a handset using the MSM8953 SoC released in 2017):
- Panel and GPU
- Touchscreen
- WiFi + Bluetooth
- Hall sensor
Patches 1 and 2 provide a driver for Novatek NT35532 and its corresponding
devicetree bindings, required for enabling panel in DTS. The remaining
patches are all DTS changes, aimed to enable the features listed above.
To: Neil Armstrong <neil.armstrong@linaro.org>
To: Jessica Zhang <jesszhan0024@gmail.com>
To: David Airlie <airlied@gmail.com>
To: Simona Vetter <simona@ffwll.ch>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: Maxime Ripard <mripard@kernel.org>
To: Thomas Zimmermann <tzimmermann@suse.de>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>
Cc: dri-devel@lists.freedesktop.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org
Cc: ~postmarketos/upstreaming@lists.sr.ht
Cc: phone-devel@vger.kernel.org
Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com>
---
Changes in v2:
- (patch 1/6): define power supplies in the bindings as per datasheet
and update example;
- (patch 2/6): add blank lines where required between mipi dsi write
sequences in nt35532_on() function and make use of names for mipi dcs
commands, instead of hex numbers, to improve readibility (Dmitry);
- (patch 3/6): move pinctrl lines ibto panel node and get rid of
sleep/reset state, since panel just uses one pinctrl state for
default/sleep (Dmitry). Also, update power supplies according to
bindings;
- (patch 4/6): pick up tags (Konrad,Dmitry);
- (patch 6/6): squash hall sensor node into gpio-keys (Dmitry);
- Link to v1: https://lore.kernel.org/r/20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com
---
Cristian Cozzolino (6):
dt-bindings: display: panel: Add Novatek NT35532 LCD DSI
drm/panel: Add driver for Novatek NT35532
arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU
arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth
arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen
arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor
.../bindings/display/panel/novatek,nt35532.yaml | 80 +++
MAINTAINERS | 6 +
.../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 139 +++-
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-novatek-nt35532.c | 779 +++++++++++++++++++++
6 files changed, 1015 insertions(+), 1 deletion(-)
---
base-commit: 8e5a478b6d6a5bb0a3d52147862b15e4d826af19
change-id: 20260303-rimob-new-features-037944b3a620
Best regards,
--
Cristian Cozzolino <cristian_ci@protonmail.com>
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v2 2/6] drm/panel: Add driver for Novatek NT35532 2026-03-18 22:28 [PATCH v2 0/6] " Cristian Cozzolino via B4 Relay @ 2026-03-18 22:28 ` Cristian Cozzolino via B4 Relay 2026-03-21 19:00 ` Claude review: " Claude Code Review Bot 0 siblings, 1 reply; 21+ messages in thread From: Cristian Cozzolino via B4 Relay @ 2026-03-18 22:28 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel, Cristian Cozzolino From: Cristian Cozzolino <cristian_ci@protonmail.com> Add support for Novatek NT35532-based 1080p video mode DSI panel. Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> --- MAINTAINERS | 1 + drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-novatek-nt35532.c | 779 ++++++++++++++++++++++++++ 4 files changed, 792 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8afb94532a89..6f4e40f65631 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8172,6 +8172,7 @@ DRM DRIVER FOR NOVATEK NT35532 PANELS M: Cristian Cozzolino <cristian_ci@protonmail.com> S: Maintained F: Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml +F: drivers/gpu/drm/panel/panel-novatek-nt35532.c DRM DRIVER FOR NOVATEK NT35560 PANELS M: Linus Walleij <linusw@kernel.org> diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index a99f2e2a49fe..1397d80a6a0f 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -522,6 +522,17 @@ config DRM_PANEL_NOVATEK_NT35510 around the Novatek NT35510 display controller, such as some Hydis panels. +config DRM_PANEL_NOVATEK_NT35532 + tristate "Novatek NT35532-based DSI video mode panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + select VIDEOMODE_HELPERS + select DRM_KMS_HELPER + help + Say Y or M here if you want to enable support for Novatek + NT35532-based 1080p video mode DSI panels. + config DRM_PANEL_NOVATEK_NT35560 tristate "Novatek NT35560 DSI command mode panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 3336a2c0cd86..dabf1201fe17 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) += panel-newvision-nv3051d.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35532) += panel-novatek-nt35532.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35532.c b/drivers/gpu/drm/panel/panel-novatek-nt35532.c new file mode 100644 index 000000000000..c57d7fdfddc5 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-novatek-nt35532.c @@ -0,0 +1,779 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree. + * Copyright (c) 2026 Cristian Cozzolino <cristian_ci@protonmail.com> + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/regulator/consumer.h> + +#include <video/mipi_display.h> + +#include <drm/drm_mipi_dsi.h> +#include <drm/drm_modes.h> +#include <drm/drm_panel.h> +#include <drm/drm_probe_helper.h> + +struct novatek_nt35532 { + struct drm_panel panel; + struct mipi_dsi_device *dsi; + struct regulator_bulk_data *supplies; + struct gpio_desc *reset_gpio; +}; + +static const struct regulator_bulk_data nt35532_supplies[] = { + { .supply = "vci" }, + { .supply = "vddi" }, + { .supply = "avee" }, + { .supply = "avdd" }, +}; + +static inline struct novatek_nt35532 *to_novatek_nt35532(struct drm_panel *panel) +{ + return container_of_const(panel, struct novatek_nt35532, panel); +} + +static void nt35532_reset(struct novatek_nt35532 *ctx) +{ + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + usleep_range(10000, 11000); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + usleep_range(5000, 6000); + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + usleep_range(10000, 11000); +} + +static int nt35532_on(struct novatek_nt35532 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x13); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x05); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x31); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0x7e); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0x55); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x50); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0xd0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x6b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x6b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x63); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x3c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x5c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x60); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0xca); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0xd5); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0xf0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0xab); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x44); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x05); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x03, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x38); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0x19); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x08, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x09, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x1d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0b, 0x17); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x13, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x14, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x18, 0x38); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x19, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1a, 0x1a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1b, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1c, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1d, 0x1c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1e, 0x16); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1f, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x20, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x21, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x22, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x23, 0x0a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x24, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x25, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x26, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x27, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x54, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x55, 0x07); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x56, 0x1a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x58, 0x19); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x59, 0x36); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5a, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0x32); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5e, 0x27); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x28); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0x2c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x62, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x63, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x64, 0x32); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x65, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x66, 0x44); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x67, 0x11); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x69, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6a, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6b, 0x22); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0xc0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x09); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0x11); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x14); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x61); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x30); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0xb0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x0a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0xda); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0xff); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xf4); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x40); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x7f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x16); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0x53); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x2a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0xf0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0x3b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x13); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x2a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x92); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x88); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xed, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xee, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xef, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfa, 0x03); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x75, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x76, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x77, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7a, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7b, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7c, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x82, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x83, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x84, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x85, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x86, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x87, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x88, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x89, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8a, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8c, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x93, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x94, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x95, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9e, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa0, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa3, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa4, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa5, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa6, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xad, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb8, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbb, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xda, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdb, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdc, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdd, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xde, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe0, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe3, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe4, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe5, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe6, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe7, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe8, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xea, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xeb, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xec, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xed, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xee, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xef, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf2, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf4, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf6, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf8, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfa, 0x91); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x03, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x08, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x09, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0b, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x13, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x14, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x18, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x19, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1a, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1b, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1c, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1d, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1e, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1f, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x20, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x21, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x22, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x23, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x24, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x25, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x26, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x27, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x28, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x29, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2a, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2b, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2f, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x30, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x31, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x32, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x33, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x34, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x35, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x36, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x37, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x38, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x39, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3a, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3b, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3f, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x40, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x41, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x42, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x43, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x44, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x45, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x46, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x47, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x48, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x49, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4a, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4b, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4c, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4d, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4e, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4f, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x50, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x51, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x52, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x53, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x54, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x55, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x56, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x58, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x59, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5a, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5e, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x62, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x63, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x64, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x65, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x66, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x67, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x69, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6a, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6b, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x70, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x71, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x72, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x73, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x74, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x75, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x76, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x77, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7a, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7b, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7c, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x82, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x83, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x84, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x85, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x86, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x87, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x88, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x89, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8a, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8c, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x93, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x94, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x95, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9e, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa0, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa3, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa4, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa5, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa6, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xad, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb8, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbb, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xda, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdb, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdc, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdd, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xde, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe0, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe3, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe4, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe5, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe6, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe7, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe8, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xea, 0xcd); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0xee); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x40, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x41, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x42, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x35, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x36, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x48); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, MIPI_DCS_EXIT_SLEEP_MODE, 0x00); + mipi_dsi_msleep(&dsi_ctx, 120); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_DISPLAY_ON, 0x00); + mipi_dsi_msleep(&dsi_ctx, 50); + + return dsi_ctx.accum_err; +} + +static int nt35532_off(struct novatek_nt35532 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; + + mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 50); + mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 120); + + return dsi_ctx.accum_err; +} + +static int nt35532_prepare(struct drm_panel *panel) +{ + struct novatek_nt35532 *ctx = to_novatek_nt35532(panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + ret = regulator_bulk_enable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + if (ret < 0) { + dev_err(dev, "Failed to enable regulators: %d\n", ret); + return ret; + } + + nt35532_reset(ctx); + + ret = nt35532_on(ctx); + if (ret < 0) { + dev_err(dev, "Failed to initialize panel: %d\n", ret); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + return ret; + } + + return 0; +} + +static int nt35532_unprepare(struct drm_panel *panel) +{ + struct novatek_nt35532 *ctx = to_novatek_nt35532(panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + ret = nt35532_off(ctx); + if (ret < 0) + dev_err(dev, "Failed to un-initialize panel: %d\n", ret); + + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + + return 0; +} + +static const struct drm_display_mode nt35532_mode = { + .clock = (1080 + 100 + 6 + 94) * (1920 + 15 + 6 + 10) * 60 / 1000, + .hdisplay = 1080, + .hsync_start = 1080 + 100, + .hsync_end = 1080 + 100 + 6, + .htotal = 1080 + 100 + 6 + 94, + .vdisplay = 1920, + .vsync_start = 1920 + 15, + .vsync_end = 1920 + 15 + 6, + .vtotal = 1920 + 15 + 6 + 10, + .width_mm = 68, + .height_mm = 121, + .type = DRM_MODE_TYPE_DRIVER, +}; + +static int nt35532_get_modes(struct drm_panel *panel, + struct drm_connector *connector) +{ + return drm_connector_helper_get_modes_fixed(connector, &nt35532_mode); +} + +static const struct drm_panel_funcs novatek_nt35532_panel_funcs = { + .prepare = nt35532_prepare, + .unprepare = nt35532_unprepare, + .get_modes = nt35532_get_modes, +}; + +static int nt35532_probe(struct mipi_dsi_device *dsi) +{ + struct device *dev = &dsi->dev; + struct novatek_nt35532 *ctx; + int ret; + + ctx = devm_drm_panel_alloc(dev, struct novatek_nt35532, panel, + &novatek_nt35532_panel_funcs, + DRM_MODE_CONNECTOR_DSI); + if (IS_ERR(ctx)) + return PTR_ERR(ctx); + + ret = devm_regulator_bulk_get_const(dev, + ARRAY_SIZE(nt35532_supplies), + nt35532_supplies, + &ctx->supplies); + if (ret < 0) + return ret; + + ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(ctx->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), + "Failed to get reset-gpios\n"); + + ctx->dsi = dsi; + mipi_dsi_set_drvdata(dsi, ctx); + + dsi->lanes = 4; + dsi->format = MIPI_DSI_FMT_RGB888; + dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_LPM; + + ctx->panel.prepare_prev_first = true; + + ret = drm_panel_of_backlight(&ctx->panel); + if (ret) + return dev_err_probe(dev, ret, "Failed to get backlight\n"); + + drm_panel_add(&ctx->panel); + + ret = mipi_dsi_attach(dsi); + if (ret < 0) { + drm_panel_remove(&ctx->panel); + return dev_err_probe(dev, ret, "Failed to attach to DSI host\n"); + } + + return 0; +} + +static void nt35532_remove(struct mipi_dsi_device *dsi) +{ + struct novatek_nt35532 *ctx = mipi_dsi_get_drvdata(dsi); + int ret; + + ret = mipi_dsi_detach(dsi); + if (ret < 0) + dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret); + + drm_panel_remove(&ctx->panel); +} + +static const struct of_device_id nt35532_of_match[] = { + { .compatible = "novatek,nt35532" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, nt35532_of_match); + +static struct mipi_dsi_driver nt35532_driver = { + .probe = nt35532_probe, + .remove = nt35532_remove, + .driver = { + .name = "panel-novatek-nt35532", + .of_match_table = nt35532_of_match, + }, +}; +module_mipi_dsi_driver(nt35532_driver); + +MODULE_DESCRIPTION("DRM driver for Novatek NT35532-based 1080p video mode DSI panel"); +MODULE_LICENSE("GPL"); -- 2.53.0 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Claude review: drm/panel: Add driver for Novatek NT35532 2026-03-18 22:28 ` [PATCH v2 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay @ 2026-03-21 19:00 ` Claude Code Review Bot 0 siblings, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-21 19:00 UTC (permalink / raw) To: dri-devel-reviews Patch Review This is the core panel driver, auto-generated from vendor device tree, with 779 lines of register init sequences. **Issue (moderate): Sleep/display-on commands sent via `mipi_dsi_generic_write_seq_multi` instead of DCS helpers** In `nt35532_on()`: ```c mipi_dsi_generic_write_seq_multi(&dsi_ctx, MIPI_DCS_EXIT_SLEEP_MODE, 0x00); mipi_dsi_msleep(&dsi_ctx, 120); mipi_dsi_generic_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_DISPLAY_ON, 0x00); ``` Using `mipi_dsi_generic_write_seq_multi` with DCS command bytes sends these as **generic write packets** rather than **DCS write packets**. The correct approach is to use the dedicated `_multi` DCS helpers, as is already done in `nt35532_off()`: ```c mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); ``` The `nt35532_on()` function should similarly use: ```c mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); mipi_dsi_msleep(&dsi_ctx, 120); mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); ``` Additionally, the trailing `0x00` parameter in these calls is suspicious — DCS exit_sleep_mode and set_display_on are zero-parameter commands. The generic_write sends `{0x11, 0x00}` as a 2-byte payload, which is not standard. Some panels may tolerate it but it's technically incorrect. **Minor: `select DRM_KMS_HELPER` in Kconfig may be unnecessary** ``` select DRM_KMS_HELPER ``` The driver uses `drm_connector_helper_get_modes_fixed()` which comes from `drm_probe_helper.h`. Check whether this is already pulled in transitively via `DRM_MIPI_DSI`. Many panel drivers don't explicitly select `DRM_KMS_HELPER`. **Style: `container_of_const` usage** ```c return container_of_const(panel, struct novatek_nt35532, panel); ``` The function returns a non-const `struct novatek_nt35532 *`, but `container_of_const` is designed to propagate const-ness. Since all callers need a mutable pointer, `container_of` would be more conventional here. That said, some newer panel drivers do use `container_of_const` — this is a minor style point. **No issues with**: regulator bulk handling, reset sequence, probe/remove lifecycle, use of `devm_drm_panel_alloc`, mode definition. The driver is clean for an auto-generated panel driver. --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 0/6] Enable new features for flipkart-rimob
@ 2026-03-21 16:23 Cristian Cozzolino via B4 Relay
2026-03-21 16:23 ` [PATCH v3 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay
0 siblings, 1 reply; 21+ messages in thread
From: Cristian Cozzolino via B4 Relay @ 2026-03-21 16:23 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio
Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm,
~postmarketos/upstreaming, phone-devel, Cristian Cozzolino,
Dmitry Baryshkov, Konrad Dybcio
This series enables a set of miscellaneous features for Billion Capture+
(a handset using the MSM8953 SoC released in 2017):
- Panel and GPU
- Touchscreen
- WiFi + Bluetooth
- Hall sensor
Patches 1 and 2 provide a driver for Novatek NT35532 and its corresponding
devicetree bindings, required for enabling panel in DTS. The remaining
patches are all DTS changes, aimed to enable the features listed above.
To: Neil Armstrong <neil.armstrong@linaro.org>
To: Jessica Zhang <jesszhan0024@gmail.com>
To: David Airlie <airlied@gmail.com>
To: Simona Vetter <simona@ffwll.ch>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: Maxime Ripard <mripard@kernel.org>
To: Thomas Zimmermann <tzimmermann@suse.de>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>
Cc: dri-devel@lists.freedesktop.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org
Cc: ~postmarketos/upstreaming@lists.sr.ht
Cc: phone-devel@vger.kernel.org
Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com>
---
Changes in v3:
- (patch 1/6): removed avdd, avee and vci supplies from 'required' properties;
- (patch 2/6):
- removed "select VIDEOMODE_HELPERS" from nt35532 Kconfig entry, since
its functions are not used (but this option is enabled and its code
compiled anyway) by nt35532 panel driver;
- pick up tags (Dmitry).
- (patch 3/6): replaced a506_zap.mdt with a506_zap.mbn firmware name
in gpu_zap_shader (Dmitry);
- (patch 5/6): pick up tags (Konrad);
- (patch 6/6): pick up tags (Konrad);
- Link to v2: https://lore.kernel.org/r/20260318-rimob-new-features-v2-0-c1bf8917449e@protonmail.com
Changes in v2:
- (patch 1/6): define power supplies in the bindings as per datasheet
and update example;
- (patch 2/6): add blank lines where required between mipi dsi write
sequences in nt35532_on() function and make use of names for mipi dcs
commands, instead of hex numbers, to improve readibility (Dmitry);
- (patch 3/6): move pinctrl lines ibto panel node and get rid of
sleep/reset state, since panel just uses one pinctrl state for
default/sleep (Dmitry). Also, update power supplies according to
bindings;
- (patch 4/6): pick up tags (Konrad,Dmitry);
- (patch 6/6): squash hall sensor node into gpio-keys (Dmitry);
- Link to v1: https://lore.kernel.org/r/20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com
---
Cristian Cozzolino (6):
dt-bindings: display: panel: Add Novatek NT35532 LCD DSI
drm/panel: Add driver for Novatek NT35532
arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU
arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth
arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen
arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor
.../bindings/display/panel/novatek,nt35532.yaml | 77 ++
MAINTAINERS | 6 +
.../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 139 +++-
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-novatek-nt35532.c | 779 +++++++++++++++++++++
6 files changed, 1011 insertions(+), 1 deletion(-)
---
base-commit: 785f0eb2f85decbe7c1ef9ae922931f0194ffc2e
change-id: 20260303-rimob-new-features-037944b3a620
Best regards,
--
Cristian Cozzolino <cristian_ci@protonmail.com>
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v3 2/6] drm/panel: Add driver for Novatek NT35532 2026-03-21 16:23 [PATCH v3 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay @ 2026-03-21 16:23 ` Cristian Cozzolino via B4 Relay 2026-03-21 17:00 ` Claude review: " Claude Code Review Bot 0 siblings, 1 reply; 21+ messages in thread From: Cristian Cozzolino via B4 Relay @ 2026-03-21 16:23 UTC (permalink / raw) To: Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: dri-devel, devicetree, linux-kernel, linux-arm-msm, ~postmarketos/upstreaming, phone-devel, Cristian Cozzolino, Dmitry Baryshkov From: Cristian Cozzolino <cristian_ci@protonmail.com> Add support for Novatek NT35532-based 1080p video mode DSI panel. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> --- MAINTAINERS | 1 + drivers/gpu/drm/panel/Kconfig | 10 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-novatek-nt35532.c | 779 ++++++++++++++++++++++++++ 4 files changed, 791 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8ed2866bbd6e..130745ecc3fc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8175,6 +8175,7 @@ DRM DRIVER FOR NOVATEK NT35532 PANELS M: Cristian Cozzolino <cristian_ci@protonmail.com> S: Maintained F: Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml +F: drivers/gpu/drm/panel/panel-novatek-nt35532.c DRM DRIVER FOR NOVATEK NT35560 PANELS M: Linus Walleij <linusw@kernel.org> diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index a99f2e2a49fe..a4a64d7afe91 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -522,6 +522,16 @@ config DRM_PANEL_NOVATEK_NT35510 around the Novatek NT35510 display controller, such as some Hydis panels. +config DRM_PANEL_NOVATEK_NT35532 + tristate "Novatek NT35532-based DSI video mode panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + select DRM_KMS_HELPER + help + Say Y or M here if you want to enable support for Novatek + NT35532-based 1080p video mode DSI panels. + config DRM_PANEL_NOVATEK_NT35560 tristate "Novatek NT35560 DSI command mode panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 3336a2c0cd86..dabf1201fe17 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) += panel-newvision-nv3051d.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35532) += panel-novatek-nt35532.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35532.c b/drivers/gpu/drm/panel/panel-novatek-nt35532.c new file mode 100644 index 000000000000..c57d7fdfddc5 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-novatek-nt35532.c @@ -0,0 +1,779 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree. + * Copyright (c) 2026 Cristian Cozzolino <cristian_ci@protonmail.com> + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/regulator/consumer.h> + +#include <video/mipi_display.h> + +#include <drm/drm_mipi_dsi.h> +#include <drm/drm_modes.h> +#include <drm/drm_panel.h> +#include <drm/drm_probe_helper.h> + +struct novatek_nt35532 { + struct drm_panel panel; + struct mipi_dsi_device *dsi; + struct regulator_bulk_data *supplies; + struct gpio_desc *reset_gpio; +}; + +static const struct regulator_bulk_data nt35532_supplies[] = { + { .supply = "vci" }, + { .supply = "vddi" }, + { .supply = "avee" }, + { .supply = "avdd" }, +}; + +static inline struct novatek_nt35532 *to_novatek_nt35532(struct drm_panel *panel) +{ + return container_of_const(panel, struct novatek_nt35532, panel); +} + +static void nt35532_reset(struct novatek_nt35532 *ctx) +{ + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + usleep_range(10000, 11000); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + usleep_range(5000, 6000); + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + usleep_range(10000, 11000); +} + +static int nt35532_on(struct novatek_nt35532 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x13); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x05); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x31); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0x7e); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0x55); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x50); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0xd0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x6b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x6b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x63); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x3c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x5c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x60); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0xca); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0xd5); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0xf0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0xab); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x44); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x05); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x03, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x38); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0x19); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x08, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x09, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x1d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0b, 0x17); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x13, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x14, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x18, 0x38); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x19, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1a, 0x1a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1b, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1c, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1d, 0x1c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1e, 0x16); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1f, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x20, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x21, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x22, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x23, 0x0a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x24, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x25, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x26, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x27, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x54, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x55, 0x07); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x56, 0x1a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x58, 0x19); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x59, 0x36); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5a, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0x32); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5e, 0x27); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x28); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0x2c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x62, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x63, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x64, 0x32); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x65, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x66, 0x44); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x67, 0x11); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x69, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6a, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6b, 0x22); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0xc0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x09); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0x11); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x14); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x61); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x30); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0xb0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x0a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0xda); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0xff); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xf4); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x40); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x7f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x16); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0x53); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x2a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0xf0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0x3b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x13); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x2a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x92); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x88); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xed, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xee, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xef, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfa, 0x03); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x75, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x76, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x77, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7a, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7b, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7c, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x82, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x83, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x84, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x85, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x86, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x87, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x88, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x89, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8a, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8c, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x93, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x94, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x95, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9e, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa0, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa3, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa4, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa5, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa6, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xad, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb8, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbb, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xda, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdb, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdc, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdd, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xde, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe0, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe3, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe4, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe5, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe6, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe7, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe8, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xea, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xeb, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xec, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xed, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xee, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xef, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf2, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf4, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf6, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf8, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfa, 0x91); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x03, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x08, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x09, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0b, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x13, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x14, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x18, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x19, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1a, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1b, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1c, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1d, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1e, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1f, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x20, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x21, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x22, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x23, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x24, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x25, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x26, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x27, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x28, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x29, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2a, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2b, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2f, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x30, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x31, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x32, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x33, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x34, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x35, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x36, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x37, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x38, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x39, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3a, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3b, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3f, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x40, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x41, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x42, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x43, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x44, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x45, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x46, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x47, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x48, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x49, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4a, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4b, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4c, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4d, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4e, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4f, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x50, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x51, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x52, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x53, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x54, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x55, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x56, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x58, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x59, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5a, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5e, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x62, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x63, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x64, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x65, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x66, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x67, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x69, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6a, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6b, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x70, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x71, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x72, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x73, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x74, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x75, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x76, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x77, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7a, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7b, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7c, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x82, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x83, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x84, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x85, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x86, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x87, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x88, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x89, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8a, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8c, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x93, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x94, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x95, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9e, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa0, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa3, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa4, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa5, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa6, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xad, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb8, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbb, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xda, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdb, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdc, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdd, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xde, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe0, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe3, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe4, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe5, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe6, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe7, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe8, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xea, 0xcd); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0xee); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x40, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x41, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x42, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x35, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x36, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x48); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, MIPI_DCS_EXIT_SLEEP_MODE, 0x00); + mipi_dsi_msleep(&dsi_ctx, 120); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_DISPLAY_ON, 0x00); + mipi_dsi_msleep(&dsi_ctx, 50); + + return dsi_ctx.accum_err; +} + +static int nt35532_off(struct novatek_nt35532 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; + + mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 50); + mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 120); + + return dsi_ctx.accum_err; +} + +static int nt35532_prepare(struct drm_panel *panel) +{ + struct novatek_nt35532 *ctx = to_novatek_nt35532(panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + ret = regulator_bulk_enable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + if (ret < 0) { + dev_err(dev, "Failed to enable regulators: %d\n", ret); + return ret; + } + + nt35532_reset(ctx); + + ret = nt35532_on(ctx); + if (ret < 0) { + dev_err(dev, "Failed to initialize panel: %d\n", ret); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + return ret; + } + + return 0; +} + +static int nt35532_unprepare(struct drm_panel *panel) +{ + struct novatek_nt35532 *ctx = to_novatek_nt35532(panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + ret = nt35532_off(ctx); + if (ret < 0) + dev_err(dev, "Failed to un-initialize panel: %d\n", ret); + + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + + return 0; +} + +static const struct drm_display_mode nt35532_mode = { + .clock = (1080 + 100 + 6 + 94) * (1920 + 15 + 6 + 10) * 60 / 1000, + .hdisplay = 1080, + .hsync_start = 1080 + 100, + .hsync_end = 1080 + 100 + 6, + .htotal = 1080 + 100 + 6 + 94, + .vdisplay = 1920, + .vsync_start = 1920 + 15, + .vsync_end = 1920 + 15 + 6, + .vtotal = 1920 + 15 + 6 + 10, + .width_mm = 68, + .height_mm = 121, + .type = DRM_MODE_TYPE_DRIVER, +}; + +static int nt35532_get_modes(struct drm_panel *panel, + struct drm_connector *connector) +{ + return drm_connector_helper_get_modes_fixed(connector, &nt35532_mode); +} + +static const struct drm_panel_funcs novatek_nt35532_panel_funcs = { + .prepare = nt35532_prepare, + .unprepare = nt35532_unprepare, + .get_modes = nt35532_get_modes, +}; + +static int nt35532_probe(struct mipi_dsi_device *dsi) +{ + struct device *dev = &dsi->dev; + struct novatek_nt35532 *ctx; + int ret; + + ctx = devm_drm_panel_alloc(dev, struct novatek_nt35532, panel, + &novatek_nt35532_panel_funcs, + DRM_MODE_CONNECTOR_DSI); + if (IS_ERR(ctx)) + return PTR_ERR(ctx); + + ret = devm_regulator_bulk_get_const(dev, + ARRAY_SIZE(nt35532_supplies), + nt35532_supplies, + &ctx->supplies); + if (ret < 0) + return ret; + + ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(ctx->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), + "Failed to get reset-gpios\n"); + + ctx->dsi = dsi; + mipi_dsi_set_drvdata(dsi, ctx); + + dsi->lanes = 4; + dsi->format = MIPI_DSI_FMT_RGB888; + dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_LPM; + + ctx->panel.prepare_prev_first = true; + + ret = drm_panel_of_backlight(&ctx->panel); + if (ret) + return dev_err_probe(dev, ret, "Failed to get backlight\n"); + + drm_panel_add(&ctx->panel); + + ret = mipi_dsi_attach(dsi); + if (ret < 0) { + drm_panel_remove(&ctx->panel); + return dev_err_probe(dev, ret, "Failed to attach to DSI host\n"); + } + + return 0; +} + +static void nt35532_remove(struct mipi_dsi_device *dsi) +{ + struct novatek_nt35532 *ctx = mipi_dsi_get_drvdata(dsi); + int ret; + + ret = mipi_dsi_detach(dsi); + if (ret < 0) + dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret); + + drm_panel_remove(&ctx->panel); +} + +static const struct of_device_id nt35532_of_match[] = { + { .compatible = "novatek,nt35532" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, nt35532_of_match); + +static struct mipi_dsi_driver nt35532_driver = { + .probe = nt35532_probe, + .remove = nt35532_remove, + .driver = { + .name = "panel-novatek-nt35532", + .of_match_table = nt35532_of_match, + }, +}; +module_mipi_dsi_driver(nt35532_driver); + +MODULE_DESCRIPTION("DRM driver for Novatek NT35532-based 1080p video mode DSI panel"); +MODULE_LICENSE("GPL"); -- 2.53.0 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* Claude review: drm/panel: Add driver for Novatek NT35532 2026-03-21 16:23 ` [PATCH v3 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay @ 2026-03-21 17:00 ` Claude Code Review Bot 0 siblings, 0 replies; 21+ messages in thread From: Claude Code Review Bot @ 2026-03-21 17:00 UTC (permalink / raw) To: dri-devel-reviews Patch Review The driver is well-written and uses current best practices. **`select DRM_KMS_HELPER` is likely unnecessary.** The driver uses `drm_connector_helper_get_modes_fixed` which is in `drm_probe_helper.c`, built via `DRM_KMS_HELPER`. However, `DRM_MIPI_DSI` (which this depends on) already selects the necessary DRM core support. That said, 4 other panel drivers in the current tree also `select DRM_KMS_HELPER`, so this is consistent. The v3 changelog says `VIDEOMODE_HELPERS` was dropped, which is correct since it's not used. **`container_of_const` vs `container_of`:** The driver uses `container_of_const` in `to_novatek_nt35532()`, but no other panel drivers in the tree currently do this. It's technically correct (the panel pointer from `prepare`/`unprepare` callbacks is indeed const-qualified at the type level), but it's unusual. Minor style difference, not a bug. **`nt35532_on()` uses `mipi_dsi_generic_write_seq_multi` for DCS commands.** At lines (in the new file) around line 613-615: ```c mipi_dsi_generic_write_seq_multi(&dsi_ctx, MIPI_DCS_EXIT_SLEEP_MODE, 0x00); ... mipi_dsi_generic_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_DISPLAY_ON, 0x00); ``` These are standard DCS commands (0x11 and 0x29) being sent via the *generic* write path with an extra `0x00` data byte. This is how the vendor downstream driver sends them (as 2-byte generic writes rather than proper DCS commands). This works but is somewhat unusual - normally `mipi_dsi_dcs_exit_sleep_mode_multi()` / `mipi_dsi_dcs_set_display_on_multi()` would be used (as is done in `nt35532_off()`). The extra `0x00` byte and the generic-vs-DCS path difference between on/off is a quirk worth a brief comment, or consider using the DCS helpers if the panel tolerates it. **Reset sequence polarity:** The reset GPIO is obtained with `GPIOD_OUT_HIGH` (asserted at probe), and the binding + DTS specify `GPIO_ACTIVE_LOW`. The reset function: ```c gpiod_set_value_cansleep(ctx->reset_gpio, 0); // deassert usleep_range(10000, 11000); gpiod_set_value_cansleep(ctx->reset_gpio, 1); // assert usleep_range(5000, 6000); gpiod_set_value_cansleep(ctx->reset_gpio, 0); // deassert ``` This is a standard deassert-assert-deassert reset pulse pattern, which is correct for an active-low reset line using the GPIO descriptor API's logical values. **Overall the driver is clean.** Uses `devm_drm_panel_alloc`, `devm_regulator_bulk_get_const`, proper error handling in probe, and the `_multi` DSI context pattern. No issues with the mode definition or panel funcs. --- Generated by Claude Code Patch Reviewer ^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2026-03-21 19:00 UTC | newest] Thread overview: 21+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-03-08 15:52 [PATCH 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay 2026-03-08 15:52 ` [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI Cristian Cozzolino via B4 Relay 2026-03-08 16:13 ` Krzysztof Kozlowski 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay 2026-03-08 19:27 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 3/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPU Cristian Cozzolino via B4 Relay 2026-03-08 15:01 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 4/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth Cristian Cozzolino via B4 Relay 2026-03-08 15:08 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 5/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen Cristian Cozzolino via B4 Relay 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 15:52 ` [PATCH 6/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor Cristian Cozzolino via B4 Relay 2026-03-08 15:14 ` Dmitry Baryshkov 2026-03-08 21:46 ` Claude review: " Claude Code Review Bot 2026-03-08 21:46 ` Claude review: Enable new features for flipkart-rimob Claude Code Review Bot -- strict thread matches above, loose matches on Subject: below -- 2026-03-18 22:28 [PATCH v2 0/6] " Cristian Cozzolino via B4 Relay 2026-03-18 22:28 ` [PATCH v2 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay 2026-03-21 19:00 ` Claude review: " Claude Code Review Bot 2026-03-21 16:23 [PATCH v3 0/6] Enable new features for flipkart-rimob Cristian Cozzolino via B4 Relay 2026-03-21 16:23 ` [PATCH v3 2/6] drm/panel: Add driver for Novatek NT35532 Cristian Cozzolino via B4 Relay 2026-03-21 17:00 ` Claude review: " Claude Code Review Bot
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