Claude review: drm/panel: Add support for Tianma TA066VVHM03 panel

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Issue 1 (medium): Missing cleanup in `prepare()` error paths after PPS/compression failures.**

```c
ret = mipi_dsi_picture_parameter_set(ctx->dsi, &pps);
if (ret < 0) {
    dev_err(panel->dev, "failed to transmit PPS: %d\n", ret);
    return ret;
}

ret = mipi_dsi_compression_mode(ctx->dsi, true);
if (ret < 0) {
    dev_err(dev, "failed to enable compression mode: %d\n", ret);
    return ret;
}
```

Both of these error paths return without disabling regulators, deasserting the enable GPIO, or asserting reset. Compare with the earlier error path after `tianma_ta066vvhm03_on()` which properly cleans up. These should do the same cleanup (or better yet, use `goto` labels for a unified error path).

Additionally, note the inconsistency: the `_on()` error path uses `dev` from `&ctx->dsi->dev`, but the PPS error path uses `panel->dev`. Should be consistent — prefer `dev` since it's already a local variable.

**Issue 2 (minor): Questionable LPM flag handling in `_off()`.**

```c
static int tianma_ta066vvhm03_off(struct tianma_ta066vvhm03 *ctx)
{
    ...
    ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;

    mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
    mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
```

This clears LPM mode before sending display-off and enter-sleep DCS commands, meaning they'll be sent in HS mode. This is unusual — most panel drivers send these in LP mode. In `_on()`, LPM is explicitly set. While this may match the vendor downstream driver behavior, it's worth double-checking whether this is intentional and required by the panel.

**Issue 3 (minor): `dsc_slice_per_pkt` dependency.**

```c
dsi->dsc_slice_per_pkt = 2;
```

As noted in the cover letter, this depends on an out-of-tree patch. This field doesn't exist in mainline `struct mipi_dsi_device`. The driver cannot be merged until that dependency lands. This should be clearly noted (it is in the cover letter, which is fine).

**Issue 4 (minor): 160 Hz pixel clock.**

```c
.clock = (1080 + 24 + 4 + 10) * (2340 + 12 + 1 + 4) * 160 / 1000,
```

This computes to `(1118 * 2357 * 160) / 1000 = 421,502` (approximately). A 160 Hz refresh rate is unusual for a phone panel — most are 60, 90, or 120 Hz. This may be correct (the ROG Phone 3 could support high refresh rates), but worth confirming this matches the actual panel specification. The `.clock` evaluates to ~421502 kHz.

**Issue 5 (nit): Consider using `mipi_dsi_picture_parameter_set_multi` for consistency.**

The `_on()` function uses the `_multi` pattern throughout, but `prepare()` switches to non-multi `mipi_dsi_picture_parameter_set()` and `mipi_dsi_compression_mode()`. Some newer DSC panel drivers (e.g., `panel-lg-sw43408.c`) use `mipi_dsi_picture_parameter_set_multi()` to keep the error handling pattern consistent. This would also help with the error path cleanup issue.

**Positive observations:**
- Correctly uses `devm_drm_panel_alloc()` (modern API).
- Uses `mipi_dsi_multi_context` pattern for init sequences — good.
- Uses `drm_connector_helper_get_modes_fixed()` — correct for single-mode panels.
- Uses `devm_regulator_bulk_get_const()` — correct since the supply array is `const`.
- DSC config looks reasonable (DSC 1.1, 10 bpc, 8 bpp, 540px slices).
- `prepare_prev_first = true` is set appropriately for DSI panels.
- The `WARN_ON(1080 % ctx->dsc.slice_width)` is a nice sanity check.

---
Generated by Claude Code Patch Reviewer