From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: pmdomain: bcm: bcm2835-power: Increase ASB control timeout Date: Fri, 13 Mar 2026 13:47:07 +1000 Message-ID: In-Reply-To: <20260312-v3d-power-management-v7-2-9f006a1d4c55@igalia.com> References: <20260312-v3d-power-management-v7-0-9f006a1d4c55@igalia.com> <20260312-v3d-power-management-v7-2-9f006a1d4c55@igalia.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Clean and targeted fix. The change from 1us to 5us is reasonable and well-j= ustified for handling workload-induced timing variability. Moving `start = =3D ktime_get_ns()` to after the MMIO write is correct =E2=80=94 the previo= us placement meant write latency consumed part of the timeout window: ```c writel(PM_PASSWORD | val, base + reg); + start =3D ktime_get_ns(); while (!!(readl(base + reg) & ASB_ACK) =3D=3D enable) { cpu_relax(); - if (ktime_get_ns() - start >=3D 1000) + if (ktime_get_ns() - start >=3D 5000) return -ETIMEDOUT; ``` Has appropriate `Cc: stable` tag and `Reviewed-by: Stefan Wahren`. No issue= s. --- Generated by Claude Code Patch Reviewer