From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/i915/display: Add hook to check optimization support for Intel platforms Date: Tue, 31 Mar 2026 17:12:01 +1000 Message-ID: In-Reply-To: <20260330133620.3750559-3-animesh.manna@intel.com> References: <20260330133620.3750559-1-animesh.manna@intel.com> <20260330133620.3750559-3-animesh.manna@intel.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Wraps the drm core function with a `DISPLAY_VER(display) < 35` guard. **Kdoc mismatch:** ``` * Returns %true if the BW allocation mode is supported on @intel_dp. ``` This is copy-pasted from the BW allocation function =E2=80=94 it should say= "PR BW optimization" instead of "BW allocation mode". The function name an= d description mention PR optimization correctly, but the Returns line is wr= ong. **DISPLAY_VER check:** Gating on display version >=3D 35 is reasonable as t= his is a new platform feature. The stub for `CONFIG_DRM_DISPLAY_DP_TUNNEL= =3Dn` is correct. --- Generated by Claude Code Patch Reviewer