[PATCH v2 14/21] drm/panel: jadard-jd9365da-h3: support Waveshare round DSI panels

Dmitry Baryshkov
2026-04-11T12:11:23Z

Add configuration for Waveshare 3.4" and 4.0" round DSI panels using
JD9365 controller.

Tested-by: Riccardo Mereu <r.mereu@arduino.cc>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c | 476 +++++++++++++++++++++++
1 file changed, 476 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
index 11b7e07c1af8..aacb8968cd01 100644
--- a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
+++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
@@ -1599,6 +1599,474 @@ static const struct jadard_panel_desc taiguan_xti05101_01a_desc = {
.enter_sleep_to_reset_down_delay_ms = 100,
};

+static int waveshare_3_4_c_init(struct jadard *jadard)
+{
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
+
+ jd9365da_switch_page(&dsi_ctx, 0x00);
+ jadard_enable_standard_cmds(&dsi_ctx);
+
+ jd9365da_switch_page(&dsi_ctx, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x41);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x10);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x44);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xd0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xd0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x26);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x09);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x78);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x64);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0xc7);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x18);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x14);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x49);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x1b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x19);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x56);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x37);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x2a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x16);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x2f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x32);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x53);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x4c);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x3d);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x31);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x20);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x0f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x56);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x37);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x2a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x16);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x2f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x32);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x53);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x4c);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x3d);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x31);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x20);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x0f);
+
+ jd9365da_switch_page(&dsi_ctx, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x5e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x5e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x50);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x48);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x48);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x4a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x4a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x44);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x44);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x46);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x46);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x57);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x57);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x77);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x77);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x42);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x5e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x5e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x50);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x49);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x49);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x4b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x4b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x45);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x45);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x47);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x47);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x57);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x57);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x77);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x77);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x41);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x1e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x1e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x10);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x07);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x07);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x05);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x05);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x09);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x09);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x03);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x1e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x10);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x06);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x06);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x08);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x08);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1f);
+
+ jd9365da_switch_page(&dsi_ctx, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x03);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0xa6);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x73);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x05);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x7f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x08);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xd9);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x43);
+
+ jd9365da_switch_page(&dsi_ctx, 0x00);
+
+ mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+ msleep(120);
+ mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+ msleep(5);
+ mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+ return dsi_ctx.accum_err;
+}
+
+static const struct jadard_panel_desc waveshare_3_4_inch_c_desc = {
+ .mode_2ln = &(const struct drm_display_mode) {
+ .clock = (800 + 40 + 20 + 20) * (800 + 24 + 4 + 12) * 60 / 1000,
+
+ .hdisplay = 800,
+ .hsync_start = 800 + 40,
+ .hsync_end = 800 + 40 + 20,
+ .htotal = 800 + 40 + 20 + 20,
+
+ .vdisplay = 800,
+ .vsync_start = 800 + 24,
+ .vsync_end = 800 + 24 + 4,
+ .vtotal = 800 + 24 + 4 + 12,
+
+ .width_mm = 88,
+ .height_mm = 88,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+ },
+ .lanes = 2,
+ .format = MIPI_DSI_FMT_RGB888,
+ .init = waveshare_3_4_c_init,
+ .mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
+ MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,
+};
+
+static int waveshare_4_0_c_init(struct jadard *jadard)
+{
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
+
+ jd9365da_switch_page(&dsi_ctx, 0x00);
+ jadard_enable_standard_cmds(&dsi_ctx);
+
+ jd9365da_switch_page(&dsi_ctx, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x41);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x10);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x44);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xd0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xd0);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x26);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x09);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x78);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0xff);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x64);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0xc7);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x18);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x14);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x49);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x1b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x19);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x56);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x37);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x2a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x16);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x2f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x32);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x53);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x4c);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x3d);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x31);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x20);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x0f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x56);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x37);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x25);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x2a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x16);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x2f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x32);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x53);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x4c);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x3d);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x31);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x20);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x0f);
+
+ jd9365da_switch_page(&dsi_ctx, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x5e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x5e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x50);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x48);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x48);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x4a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x4a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x44);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x44);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x46);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x46);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x57);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x57);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x77);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x77);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x42);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x5e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x5e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x50);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x49);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x49);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x4b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x4b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x45);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x45);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x47);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x47);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x57);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x57);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x77);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x77);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x41);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x5f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x1e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x1e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x10);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x07);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x07);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x05);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x05);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x0b);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x09);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x09);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x03);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x1e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x10);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x06);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x06);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x0a);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x08);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x08);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x1f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x17);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1f);
+
+ jd9365da_switch_page(&dsi_ctx, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x01);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x02);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x03);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0xa6);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x43);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x30);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x73);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x05);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x7f);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x08);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x04);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xd9);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x33);
+ mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x43);
+
+ jd9365da_switch_page(&dsi_ctx, 0x00);
+
+ mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+ msleep(120);
+ mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+ msleep(5);
+ mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+ return dsi_ctx.accum_err;
+}
+
+static const struct jadard_panel_desc waveshare_4_0_inch_c_desc = {
+ .mode_2ln = &(const struct drm_display_mode) {
+ .clock = (720 + 40 + 20 + 20) * (720 + 24 + 4 + 12) * 60 / 1000,
+
+ .hdisplay = 720,
+ .hsync_start = 720 + 40,
+ .hsync_end = 720 + 40 + 20,
+ .htotal = 720 + 40 + 20 + 20,
+
+ .vdisplay = 720,
+ .vsync_start = 720 + 24,
+ .vsync_end = 720 + 24 + 4,
+ .vtotal = 720 + 24 + 4 + 12,
+
+ .width_mm = 88,
+ .height_mm = 88,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+ },
+ .lanes = 2,
+ .format = MIPI_DSI_FMT_RGB888,
+ .init = waveshare_4_0_c_init,
+ .mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
+ MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,
+};
+
static int jadard_dsi_probe(struct mipi_dsi_device *dsi)
{
struct device *dev = &dsi->dev;
@@ -1708,6 +2176,14 @@ static const struct of_device_id jadard_of_match[] = {
.compatible = "taiguanck,xti05101-01a",
.data = &taiguan_xti05101_01a_desc
},
+ {
+ .compatible = "waveshare,3.4-dsi-touch-c",
+ .data = &waveshare_3_4_inch_c_desc
+ },
+ {
+ .compatible = "waveshare,4.0-dsi-touch-c",
+ .data = &waveshare_4_0_inch_c_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, jadard_of_match);

--
2.47.3