From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: dt-bindings: display/msm: gpu: Document Adreno X2-185 Date: Sat, 16 May 2026 14:42:42 +1000 Message-ID: In-Reply-To: <20260512-glymur-gpu-dt-v3-2-84232dc21c03@oss.qualcomm.com> References: <20260512-glymur-gpu-dt-v3-0-84232dc21c03@oss.qualcomm.com> <20260512-glymur-gpu-dt-v3-2-84232dc21c03@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review **Change:** Adds `qcom,adreno-44070001` to the GPU DT binding with constraints for exactly 2 reg entries (`kgsl_3d0_reg_memory` and `cx_mem`). The compatible string matches the chip ID in `a6xx_catalog.c:2113`. The reg constraint of exactly 2 entries (no `cx_dbgc`) is consistent with the cover letter's explanation that cx_dbgc is now part of kgsl_3d0_reg_memory range. The patch also adds the compatible to the "Starting with A6xx, clocks are defined in GMU node" block, which correctly disables `clocks`/`clock-names` at the GPU node level. **Observation:** The subject says "Adreno X2-185" but the cover letter says "Adreno X2-85". Minor inconsistency in the marketing name -- the actual chip ID (44070001) is consistent throughout. This may just be the official full name vs. shorthand. **Verdict:** Looks correct. --- --- Generated by Claude Code Patch Reviewer