From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/amd/display: convert dcn10 GPIO translation to lookup tables Date: Sat, 16 May 2026 13:03:13 +1000 Message-ID: In-Reply-To: <20260512190019.228440-3-guilherme.bozi@usp.br> References: <20260512190019.228440-1-guilherme.bozi@usp.br> <20260512190019.228440-3-guilherme.bozi@usp.br> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Clean conversion. DCN10 is the most feature-complete generation with SYNCA, I2C_PAD, and all DDC/GENERIC/HPD/GSL entries present in both tables. All entries match the original switch cases. One minor nit: the `gpio_pins[]` DDC_CLOCK entry for I2C_PAD has slightly different indentation than the other entries: ```c GPIO_PIN_ENTRY(GPIO_ID_DDC_CLOCK, GPIO_DDC_LINE_I2C_PAD, DC_GPIO_I2CPAD_A, DC_GPIO_DDC6_A__DC_GPIO_DDC6CLK_A_MASK), ``` The extra spaces before `DC_GPIO_I2CPAD_A` break the alignment pattern used by all other entries (single tab). Trivial cosmetic issue. The original code had explicit `case REG(DC_GPIO_PWRSEQ_A)` / `case REG(DC_GPIO_PAD_STRENGTH_*)` / `case REG(DC_GPIO_DEBUG)` that returned `false` (without asserting). Those offsets will now fall through to `ASSERT_CRITICAL(false)` instead of a silent `return false`. This is arguably an improvement (unexpected offsets should assert) but is technically a minor behavior change if those offsets are ever hit. --- Generated by Claude Code Patch Reviewer