From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: tegra: Enable DMA Support on Tegra194 QSPI Date: Tue, 26 May 2026 07:40:38 +1000 Message-ID: In-Reply-To: <20260525-tegra194-qspi-iommu-v2-2-a11c53f804b2@gmail.com> References: <20260525-tegra194-qspi-iommu-v2-0-a11c53f804b2@gmail.com> <20260525-tegra194-qspi-iommu-v2-2-a11c53f804b2@gmail.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review This is a straightforward DT change adding `dmas` and `dma-names` properties to both QSPI controller nodes in tegra194.dtsi. **QSPI0 (spi@3270000):** ```c + dmas = <&gpcdma 5>, <&gpcdma 5>; + dma-names = "rx", "tx"; ``` **QSPI1 (spi@3300000):** ```c + dmas = <&gpcdma 6>, <&gpcdma 6>; + dma-names = "rx", "tx"; ``` The format matches exactly the pattern used by all other peripherals in the same file (I2C, UART nodes all use the same `<&gpcdma N>, <&gpcdma N>` with `"rx", "tx"` pattern). The DMA channel numbers (5 for QSPI0, 6 for QSPI1) use the same channel for both RX and TX, which is consistent with how other Tegra peripherals reference their gpcdma channels (e.g., UARTs, I2C controllers all share the same channel number for rx/tx). The commit message could be slightly improved - it mentions "Without dma enabled pio mode is used" which should probably be "Without DMA enabled, PIO mode is used" (capitalization and comma), but that's purely cosmetic. **No issues with this patch.** --- Generated by Claude Code Patch Reviewer