From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: renesas: r9a09g047: Add DU{0, 1} and DSI nodes Date: Sun, 12 Apr 2026 12:46:00 +1000 Message-ID: In-Reply-To: References: X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Adds the DSI, DU0, and DU1 device tree nodes. **Observation on port layout**: DU0 has port@0 (DSI), port@2 (LVDS0), port@= 3 (LVDS1). DU1 has port@0 (DSI), port@1 (DPAD/RGB), port@3 (LVDS1). This ma= tches the bindings from patch 10. **Note**: Both `dsi_in0` and `dsi_in1` endpoints in the DSI node are empty = (no `remote-endpoint`). This is correct =E2=80=94 they'll be connected at t= he board level. However, `dsi_out` is also empty with no `data-lanes` prope= rty. The binding schema requires `data-lanes` in the output endpoint. This = will need to be filled in at the board level (which patch 21 does). **Minor**: The nodes are placed before `fcpvd0`/`fcpvd1` in the SoC DTSI. S= ince nodes are ordered by address, `dsi@16430000`, `du0@16460000`, `du1@164= 90000` come before `fcp@16470000` and `fcp@164a0000`, but `fcp@16470000` fa= lls between `du0@16460000` and `vsp@16480000`. This interleaving is slightl= y unusual but follows address ordering correctly. --- Generated by Claude Code Patch Reviewer