Re: [PATCH v4 18/39] drm/msm/dp: add support to send ACT packets for MST

Dmitry Baryshkov
2026-04-11T18:57:22Z

On Fri, Apr 10, 2026 at 05:33:53PM +0800, Yongxing Mou wrote:
> From: Abhinav Kumar <quic_abhinavk@quicinc.com>
>
> Whenever virtual channel slot allocation changes, the DP
> source must send the action control trigger sequence to notify
> the sink about the same. This would be applicable during the
> start and stop of the pixel stream. Add the infrastructure
> to be able to send ACT packets for the DP controller when
> operating in MST mode.
>
> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
> ---
> drivers/gpu/drm/msm/dp/dp_ctrl.c | 43 +++++++++++++++++++++++++++++++++++--
> drivers/gpu/drm/msm/dp/dp_ctrl.h | 3 ++-
> drivers/gpu/drm/msm/dp/dp_display.c | 3 ++-
> drivers/gpu/drm/msm/dp/dp_display.h | 1 +
> drivers/gpu/drm/msm/dp/dp_reg.h | 2 ++
> 5 files changed, 48 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index 1109b2df21be..6f25145ef214 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> @@ -143,6 +143,7 @@ struct msm_dp_ctrl_private {
> bool core_clks_on;
> bool link_clks_on;
> bool stream_clks_on[DP_STREAM_MAX];
> + bool mst_active;
> };
>
> static inline u32 msm_dp_read_ahb(const struct msm_dp_ctrl_private *ctrl, u32 offset)
> @@ -228,6 +229,32 @@ static int msm_dp_aux_link_configure(struct drm_dp_aux *aux,
> return err;
> }
>
> +int msm_dp_ctrl_mst_send_act(struct msm_dp_ctrl *msm_dp_ctrl)
> +{
> + struct msm_dp_ctrl_private *ctrl;
> + bool act_complete;
> +
> + ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctrl);
> +
> + if (!ctrl->mst_active)
> + return 0;
> +
> + msm_dp_write_link(ctrl, 0, REG_DP_MST_ACT, 0x1);
> + /* make sure ACT signal is performed */
> + wmb();
> +
> + msleep(20); /* needs 1 frame time */

20 ms is 50fps. What if we have 30 or 25 fps?

> +
> + act_complete = msm_dp_read_link(ctrl, 0, REG_DP_MST_ACT);
> +

Nit: drop empty line.

> + if (!act_complete) {
> + drm_dbg_dp(ctrl->drm_dev, "MST ACT trigger complete failed\n");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> /*
> * NOTE: resetting DP controller will also clear any pending HPD related interrupts
> */
> @@ -2081,6 +2108,10 @@ static int msm_dp_ctrl_link_maintenance(struct msm_dp_ctrl_private *ctrl)
>
> msm_dp_write_link(ctrl, 0, REG_DP_STATE_CTRL, DP_STATE_CTRL_SEND_VIDEO);
>
> + ret = msm_dp_ctrl_mst_send_act(&ctrl->msm_dp_ctrl);
> + if (ret)
> + return ret;
> +
> ret = msm_dp_ctrl_wait4video_ready(ctrl);
> end:
> return ret;
> @@ -2277,7 +2308,7 @@ static int msm_dp_ctrl_process_phy_test_request(struct msm_dp_ctrl_private *ctrl
> msm_dp_ctrl_off_pixel_clk(&ctrl->msm_dp_ctrl, ctrl->panel->stream_id);
> msm_dp_ctrl_off_link(&ctrl->msm_dp_ctrl);
>
> - ret = msm_dp_ctrl_on_link(&ctrl->msm_dp_ctrl);
> + ret = msm_dp_ctrl_on_link(&ctrl->msm_dp_ctrl, false);
> if (ret) {
> DRM_ERROR("failed to enable DP link controller\n");
> return ret;
> @@ -2357,7 +2388,7 @@ static bool msm_dp_ctrl_channel_eq_ok(struct msm_dp_ctrl_private *ctrl)
> return drm_dp_channel_eq_ok(link_status, num_lanes);
> }
>
> -int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl)
> +int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl, bool mst_active)
> {
> int rc = 0;
> struct msm_dp_ctrl_private *ctrl;
> @@ -2375,6 +2406,7 @@ int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl)
>
> rate = ctrl->panel->link_info.rate;
> pixel_rate = ctrl->panel->msm_dp_mode.drm_mode.clock;
> + ctrl->mst_active = mst_active;

Should it be set to active only when you actually activate the MST?

>
> msm_dp_ctrl_core_clk_enable(&ctrl->msm_dp_ctrl);
>
> @@ -2654,6 +2686,10 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel *
>
> msm_dp_write_link(ctrl, 0, REG_DP_STATE_CTRL, DP_STATE_CTRL_SEND_VIDEO);
>

I'd rather have the `if mst_active` here rather than in the function.

> + ret = msm_dp_ctrl_mst_send_act(msm_dp_ctrl);
> + if (ret)
> + return ret;
> +
> ret = msm_dp_ctrl_wait4video_ready(ctrl);
> if (ret)
> return ret;
> @@ -2693,6 +2729,8 @@ void msm_dp_ctrl_off_link(struct msm_dp_ctrl *msm_dp_ctrl)
>
> msm_dp_ctrl_reset(&ctrl->msm_dp_ctrl);
>
> + ctrl->mst_active = false;
> +
> dev_pm_opp_set_rate(ctrl->dev, 0);
> msm_dp_ctrl_link_clk_disable(&ctrl->msm_dp_ctrl);
>
> @@ -2876,6 +2914,7 @@ struct msm_dp_ctrl *msm_dp_ctrl_get(struct device *dev, struct msm_dp_link *link
> ctrl->link_base = link_base;
> ctrl->mst2link_base = mst2link_base;
> ctrl->mst3link_base = mst3link_base;
> + ctrl->mst_active = false;
>
> ret = msm_dp_ctrl_clk_init(&ctrl->msm_dp_ctrl, max_stream);
> if (ret) {
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h
> index e72d501ac1ce..f82fd96e412a 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.h
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h
> @@ -16,7 +16,7 @@ struct msm_dp_ctrl {
>
> struct phy;
>
> -int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl);
> +int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl, bool mst_active);
> int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel *msm_dp_panel);
> int msm_dp_ctrl_prepare_stream_on(struct msm_dp_ctrl *msm_dp_ctrl, bool force_link_train);
> void msm_dp_ctrl_off_link(struct msm_dp_ctrl *msm_dp_ctrl);
> @@ -51,4 +51,5 @@ void msm_dp_ctrl_disable_irq(struct msm_dp_ctrl *msm_dp_ctrl);
>
> void msm_dp_ctrl_reinit_phy(struct msm_dp_ctrl *msm_dp_ctrl);
> int msm_dp_ctrl_get_stream_cnt(struct msm_dp_ctrl *dp_ctrl);
> +int msm_dp_ctrl_mst_send_act(struct msm_dp_ctrl *msm_dp_ctrl);
> #endif /* _DP_CTRL_H_ */
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index a924fbd825f7..80bb5fc4003f 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -660,7 +660,7 @@ static int msm_dp_display_prepare(struct msm_dp_display_private *dp)
> force_link_train = true;
> }
>
> - rc = msm_dp_ctrl_on_link(dp->ctrl);
> + rc = msm_dp_ctrl_on_link(dp->ctrl, msm_dp_display->mst_active);
> if (rc)
> DRM_ERROR("Failed link training (rc=%d)\n", rc);
> // TODO: schedule drm_connector_set_link_status_property()
> @@ -1547,6 +1547,7 @@ void msm_dp_display_atomic_disable(struct msm_dp *dp)
> msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
>
> msm_dp_ctrl_push_idle(msm_dp_display->ctrl);
> + msm_dp_ctrl_mst_send_act(msm_dp_display->ctrl);
> }
>
> static void msm_dp_display_unprepare(struct msm_dp_display_private *dp)
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
> index b0cfdf215970..fdbe6e4871d9 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.h
> +++ b/drivers/gpu/drm/msm/dp/dp_display.h
> @@ -19,6 +19,7 @@ struct msm_dp {
> struct drm_bridge *bridge;
> bool audio_enabled;
> bool power_on;
> + bool mst_active;
> unsigned int connector_type;
> bool is_edp;
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
> index 1c2d3d8d029d..237325d52dbd 100644
> --- a/drivers/gpu/drm/msm/dp/dp_reg.h
> +++ b/drivers/gpu/drm/msm/dp/dp_reg.h
> @@ -156,6 +156,8 @@
> #define DP_CONFIGURATION_CTRL_BPC_SHIFT (0x08)
> #define DP_CONFIGURATION_CTRL_LSCLK_DIV_SHIFT (0x0D)
>
> +#define REG_DP_MST_ACT (0x00000500)
> +
> #define REG_DP_SOFTWARE_MVID (0x00000010)
> #define REG_DP_SOFTWARE_NVID (0x00000018)
> #define REG_DP_TOTAL_HOR_VER (0x0000001C)
>
> --
> 2.43.0
>

--
With best wishes
Dmitry