From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: renesas: r9a09g047e57-smarc: Enable DU0 and DSI support Date: Sun, 12 Apr 2026 12:46:00 +1000 Message-ID: In-Reply-To: <481fefa0c9f6f0629a663fe3da1fb17e7f4a1a05.1775636898.git.tommaso.merciai.xr@bp.renesas.com> References: <481fefa0c9f6f0629a663fe3da1fb17e7f4a1a05.1775636898.git.tommaso.merciai.xr@bp.renesas.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Board-level enablement connecting DU0 =E2=86=92 DSI =E2=86=92 ADV7535 =E2= =86=92 HDMI connector. **Observation**: Only DU0's DSI output is connected. DU1 is not enabled. LV= DS outputs are not connected. This matches a typical SMARC EVK configuratio= n with HDMI output. **The ADV7535 configuration looks correct**: Uses 4 DSI data lanes, proper = supplies, CEC clock, I2C addresses for main/edid/cec/packet. **Minor**: The `dsi_in0` and `dsi_out` endpoints are overridden here =E2=80= =94 `dsi_in0` gets `remote-endpoint =3D <&du0_out_dsi>` and `dsi_out` gets = `remote-endpoint =3D <&adv7535_in>` plus `data-lanes`. This is the standard= pattern for DT overlays/board files. The empty endpoints in the SoC DTSI (= patch 20) serve as connection points. No significant issues. --- **Summary of actionable items**: 1. **Patch 13 (bug)**: Fix indentation of the `if (IS_ERR(dsi->vclk[0]))` b= lock =E2=80=94 currently at wrong indent level. 2. **Patch 13 (bug)**: Initialize `ep_enabled =3D false` in `rzg2l_mipi_dsi= _get_input_port()` to prevent use of uninitialized variable when no endpoin= ts exist. 3. **Patch 13 (bug)**: `of_device_is_available(remote_ep)` is checking an e= ndpoint node, not a device node. Endpoint nodes don't have `status` propert= ies =E2=80=94 should check the port parent device instead. 4. **Patch 13 (bug)**: Missing `of_node_put(ep_node)` when breaking out of = `for_each_endpoint_of_node` loop early. 5. **Patch 14 (minor)**: `rzg3e_mipi_dsi_info` should be `const` like the o= ther hw_info structs. 6. **Patch 10 (question)**: Is requiring `port@3` (LVDS1) for all RZ/G3E DU= nodes intentional? This seems overly restrictive. --- Generated by Claude Code Patch Reviewer