From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: soc: qcom: ubwc: deduplicate UBWC configuration data Date: Mon, 09 Mar 2026 08:32:20 +1000 Message-ID: In-Reply-To: <20260306-ubwc-rework-v1-24-9cfdff12f2bb@oss.qualcomm.com> References: <20260306-ubwc-rework-v1-0-9cfdff12f2bb@oss.qualcomm.com> <20260306-ubwc-rework-v1-24-9cfdff12f2bb@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Final cleanup: replaces per-SoC named configs (`sm8250_data`, `sm8350_data`, etc.) with generic versioned configs (`ubwc_4_0_hbb16`, `ubwc_2_0_hbb14`, etc.). Reduces from ~22 unique structs to ~14. The naming convention `ubwc_X_Y_hbbZ` is clear and maintainable. Only `sa8775p_data` and `glymur_data` remain as named configs since they have non-default flags. **Minor**: There's a double-space typo in: ```c +static const struct qcom_ubwc_cfg_data ubwc_3_1_hbb14 = { ``` **Note**: The `/* TODO: highest_bank_bit = 15 for LP_DDR4 */` comments are dropped. The struct-level comment on `highest_bank_bit` mentions DRAM type detection, but the per-platform reminders are lost. Not a blocker but worth noting. --- Generated by Claude Code Patch Reviewer