From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: soc: qcom: ubwc: deduplicate UBWC configuration data Date: Fri, 13 Mar 2026 14:12:53 +1000 Message-ID: In-Reply-To: <20260312-ubwc-rework-v3-27-b7e8f800176a@oss.qualcomm.com> References: <20260312-ubwc-rework-v3-0-b7e8f800176a@oss.qualcomm.com> <20260312-ubwc-rework-v3-27-b7e8f800176a@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Renames per-SoC configs to generic `ubwc_X_Y_hbbNN` names and shares identi= cal structs. All mappings verified correct. **Minor nit:** Double space in declaration: `ubwc_3_1_hbb14 =3D {` **Note:** The `TODO: highest_bank_bit =3D 15 for LP_DDR4` comments are sile= ntly dropped for sm8250/sm8350/sm8550. The commit message should acknowledg= e this. --- **Summary of actionable items (by priority):** 1. **Patch 24 (HIGH):** Clarify sc8180x macrotile_mode change =E2=80=94 is = this an intentional correction of a previously incorrect value, or should t= he version be bumped to `UBWC_3_1`? The commit message should explicitly ad= dress this. 2. **Patch 23:** Several SoCs gain `bank_spread =3D true` that previously h= ad it false. Commit message justifies this with docs, but worth double-chec= king on actual hardware. 3. **Patch 27:** Dropped LP_DDR4 TODO comments should be mentioned. 4. **Patch 3:** `qcom_ubwc_bank_spread()` returning unconditional `true` de= serves a comment explaining why. 5. **Minor grammar/style:** Commit message typos in patches 21/22, double s= pace in patch 27. --- Generated by Claude Code Patch Reviewer