From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: phy: qcom-uniphy: add more registers from display PHYs Date: Mon, 16 Mar 2026 12:07:59 +1000 Message-ID: In-Reply-To: <20260314-fd-hdmi-phy-v5-3-58122ae96d3b@oss.qualcomm.com> References: <20260314-fd-hdmi-phy-v5-0-58122ae96d3b@oss.qualcomm.com> <20260314-fd-hdmi-phy-v5-3-58122ae96d3b@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Adds additional UNI PLL register definitions needed by the HDMI and DSI PHYs. The registers fill in the gaps in the address map between the SATA-only registers. **Naming inconsistency:** Some registers have proper names (`UNIPHY_PLL_POSTDIV1_CFG`, `UNIPHY_PLL_VCOLPF_CFG`) while others use generic numbered names (`UNIPHY_PLL_CTRL_42` through `UNIPHY_PLL_CTRL_54`). The numbered ones presumably lack documentation. This is acceptable but worth a comment explaining why. No blocking issues. --- Generated by Claude Code Patch Reviewer