From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: rockchip: orangepi-5-pro: Add LT8711UXD DP-to-HDMI bridge Date: Tue, 05 May 2026 11:54:24 +1000 Message-ID: In-Reply-To: <20260429041528.558254-4-dennis@ausil.us> References: <20260429041528.558254-1-dennis@ausil.us> <20260429041528.558254-4-dennis@ausil.us> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review This wires up the full display pipeline: VOP2 vp1 =E2=86=92 dp0 =E2=86=92 L= T8711UXD bridge =E2=86=92 HDMI1 connector. A few observations: **1. `regulator-always-on` (minor/acceptable):** ```dts + vcc3v3_dp: regulator-vcc3v3-dp { + ... + regulator-always-on; + }; ``` The cover letter documents the HPD chicken-and-egg problem well: simple-bri= dge only calls `pre_enable` on modeset, but modeset won't start until HPD a= sserts, and HPD won't assert until the bridge is powered. Holding the suppl= y on from boot is the standard workaround for autonomous bridges. Worth not= ing this means the enable GPIO stays asserted during suspend =E2=80=94 on a= desktop-class SBC this is unlikely to matter, but it's a trade-off to be a= ware of. **2. Missing `status =3D "okay"` on `&usbdp_phy0` (probably fine):** The `&usbdp_phy0` override only updates the comment and keeps the existing = `rockchip,dp-lane-mux =3D <0 1>;`. The base DTS (from the earlier Orange Pi= 5 Pro series) presumably already enables the PHY for the USB3 Type-A port.= Just confirming that the prior series does set `status =3D "okay"` there = =E2=80=94 if it doesn't, DP won't work. **3. VOP2/DP pipeline matches existing patterns:** The `&vp1` endpoint and `&dp0_in`/`&dp0_out` wiring matches the established= pattern from boards like indiedroid-nova and coolpi-4b: ```dts +&vp1 { + vp1_out_dp0: endpoint@a { + reg =3D ; + remote-endpoint =3D <&dp0_in_vp1>; + }; +}; ``` This is correct =E2=80=94 `ROCKCHIP_VOP2_EP_DP0` =3D 10 =3D 0xa, matching t= he `endpoint@a` unit address. **4. Bridge node naming (nit):** ```dts + hdmi-bridge { + compatible =3D "lontium,lt8711uxd"; ``` Some Rockchip DTS maintainers might prefer a more descriptive node name (e.= g., `dp-to-hdmi-bridge`) but `hdmi-bridge` is fine and used by other boards. **5. `dp-lane-mux =3D <0 1>` (correct):** Using lanes 0/1 for DP and implicitly leaving lanes 2/3 for USB3 SuperSpeed= matches the board's schematic description where the Type-A host connector = uses the other pair. This is the same pattern as coolpi-4b. **Overall for patch 3:** Looks correct and well-structured. No blocking iss= ues. --- Generated by Claude Code Patch Reviewer