From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: dt-bindings: arm-smmu: Update the description for Glymur GPU SMMU Date: Sat, 16 May 2026 12:51:47 +1000 Message-ID: In-Reply-To: <20260513-glymur-gpu-dt-v4-3-f83832c3bc9a@oss.qualcomm.com> References: <20260513-glymur-gpu-dt-v4-0-f83832c3bc9a@oss.qualcomm.com> <20260513-glymur-gpu-dt-v4-3-f83832c3bc9a@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Changes the SM8750 SMMU compatible from a `const` to an `enum` to also acce= pt `qcom,glymur-smmu-500`, sharing the same single-clock ("hlos") configura= tion. ```yaml - enum: - qcom,glymur-smmu-500 - qcom,sm8750-smmu-500 ``` Clean and minimal. The enum values are alphabetically ordered. No issues. **Note:** The commit message says "Add the interconnects property to the co= mmon SMMU properties" but the diff only shows the compatible enum change = =E2=80=94 no interconnects property is added. This appears to be stale text= from a previous version (the v3 changelog mentions removing the interconne= ct property). The commit message should be updated to match the actual chan= ge. --- Generated by Claude Code Patch Reviewer