From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/a8xx: Enable CLX feature on Adreno X2-85 Date: Sat, 16 May 2026 08:47:14 +1000 Message-ID: In-Reply-To: <20260516-a8xx-clx-support-v1-3-62508bf651ac@oss.qualcomm.com> References: <20260516-a8xx-clx-support-v1-0-62508bf651ac@oss.qualcomm.com> <20260516-a8xx-clx-support-v1-3-62508bf651ac@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review **Same `static const` issue as patch 2:** ```c struct a6xx_hfi_limits_tbl x285_limits_tbl[] = { ``` Should be `static const struct a6xx_hfi_limits_tbl x285_limits_tbl[]`. **Data is structurally identical to A840 with different tuning values.** The X2-85 has higher current limits (18000 vs 6000 for IFF GX, 66000 vs 30000 for PCLX GX) and different SID values, and both CLX domains have `curr_budget = 100` (vs 100/50 for A840), consistent with a more power-hungry GPU. **Minor observation:** Patches 2 and 3 place the X2-85 data tables *before* the A840 data tables in the source file (line 1799 vs 2108), which is fine since order doesn't matter for catalog entries, but it does mean the series adds X2-85 tables earlier in the file than A840 tables despite A840 being enabled first in the series. Not a problem, just mildly surprising when reading the diff. --- **Summary of requested changes:** 1. **Patch 1**: Make `struct a6xx_limits_tbl::tbl` a `const` pointer: `const struct a6xx_hfi_limits_tbl *tbl` 2. **Patches 2 & 3**: Add `static const` to `a840_limits_tbl[]` and `x285_limits_tbl[]` --- Generated by Claude Code Patch Reviewer